IP Library › Granted Patent US 10,885,926
Granted Patent B2
US 10,885,926 · App. 16/749,755 · Granted Jan 5, 2021

Classification between time-domain coding and frequency domain coding for high bit rates

Inventor: Yang Gao (Mission Viejo, CA)
Assignee: Huawei Technologies Co., Ltd.
G10L19/125G10L19/002G10L19/22G10L2019/0002G10L2019/0011G10L2019/0016
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Quick Facts
Patent No.
US 10,885,926
App. No.
16/749,755
Granted
Jan 5, 2021
Kind
B2
Abstract

A method for processing speech signals prior to encoding a digital signal comprising audio data includes selecting frequency domain coding or time domain coding based on a coding bit rate to be used for coding the digital signal and a short pitch lag detection of the digital signal.

Claims (45)

1. A non-transitory computer-readable storage medium comprising instructions which, when executed by one or more processors, cause the one or more processors to process speech signals prior to encoding a digital signal comprising audio data by carrying out steps comprising:

receiving the digital signal that is to be encoded; and

selecting time domain coding based on

determining that a coding bit rate to be used for coding the digital signal is less than a first bit rate limit, and

detecting that the digital signal comprises a short pitch signal for which the pitch lag is shorter than a pitch lag limit, wherein the pitch lag limit is a minimum allowable pitch for a Code Excited Linear Prediction Technique (CELP) algorithm for coding the digital signal.

2. The non-transitory computer-readable storage medium of claim 1 , wherein the minimum allowable pitch is 34 when a sampling rate is 12.8 kHz.

3. The non-transitory computer-readable storage medium of claim 1 , wherein the first bit rate limit is 24.4 kbps.

4. The non-transitory computer-readable storage medium of claim 1 , wherein the instructions, when executed by the one or more processors, further cause the one or more processors to carry out steps comprising:

selecting frequency domain coding for coding the digital signal based on determining that the coding bit rate is greater than the first bit rate limit.

5. The non-transitory computer-readable storage medium of claim 4 , wherein the first bit rate limit is 24.4 kbps.

6. The non-transitory computer-readable storage medium of claim 1 , wherein detecting the digital signal comprises a short pitch signal comprises:

detecting the digital signal comprises the short pitch signal based on a parameter for detecting lack of very low frequency energy or a parameter for spectral sharpness.

7. The non-transitory computer-readable storage medium of claim 1 , wherein the instructions, when executed by the one or more processors, further cause the one or more processors to carry out steps comprising: coding the digital signal using the selected time domain coding.

8. A device for processing speech signals prior to encoding a digital signal comprising audio data, the device comprising:

a display;

a memory storing computer instructions;

a processor coupled to retrieve and execute the computer instructions to prompt the processor to perform the steps of:

receiving the digital signal that is to be encoded; and

selecting time domain coding based on

determining that a coding bit rate to be used for coding the digital signal is less than a first bit rate limit, and

detecting that the digital signal comprises a short pitch signal for which the pitch lag is shorter than a pitch lag limit, wherein the pitch lag limit is a minimum allowable pitch for a Code Excited Linear Prediction Technique (CELP) algorithm for coding the digital signal.

9. The device of claim 8 , wherein the minimum allowable pitch is 34 when a sampling rate is 12.8 kHz.

10. The device of claim 8 , wherein the first bit rate limit is 24.4 kbps.

11. The device of claim 8 , the processor is further configured to execute the computer instructions to prompt the processor to perform the steps of:

selecting frequency domain coding for coding the digital signal based on:

determining the digital signal comprises the short pitch signal, the coding bit rate is intermediate between the first bit rate limit and a second bit rate limit, and a voicing periodicity is low.

12. The device of claim 11 , wherein the first bit rate limit is 24.4 kbps, the second bit rate limit is 46.2 kbps.

13. The device of claim 11 , the processor is further configured to execute the computer instructions to prompt the processor to perform the steps of selecting frequency domain coding for coding the digital signal when a coding bit rate is higher than the second bit rate limit.

14. The device of claim 8 , wherein detecting the digital signal comprising the short pitch signal comprises:

detecting based on a parameter for detecting lack of very low frequency energy or a parameter for spectral sharpness.

15. The device of claim 8 , the processor is further configured to execute the computer instructions to prompt the processor to perform the steps of coding the digital signal using the selected time domain coding.

16. A device for processing speech signals prior to encoding a digital signal comprising audio data, the device comprising:

a display;

a memory storing computer instructions;

a processor coupled to retrieve and execute the computer instructions to prompt the processor to perform the steps of:

receiving the digital signal that is to be encoded;

selecting a coding scheme to be

time domain coding in response to determining that a coding bit rate to be used for coding the digital signal is less than a first bit rate limit, and

frequency domain coding in response to determining that the coding bit rate is intermediate between the first bit rate limit and a second bit rate limit, and a voicing periodicity is low; and

coding the digital signal with the selected coding scheme in response to detecting that the digital signal comprises a short pitch signal for which the pitch lag is shorter than a pitch lag limit, wherein the pitch lag limit is a minimum allowable pitch for a Code Excited Linear Prediction Technique (CELP) algorithm for coding the digital signal.

17. The device of claim 16 , wherein the minimum allowable pitch is 34 when a sampling rate is 12.8 kHz.

18. The device of claim 16 , wherein the first bit rate limit is 24.4 kbps, the second bit rate limit is 46.2 kbps.

19. The device of claim 16 , the processor is further configured to execute the computer instructions to prompt the processor to perform the steps of selecting the coding scheme to be frequency domain coding in response to determining that the coding bit rate is higher than the second bit rate limit.

20. The device of claim 16 , wherein detecting the digital signal comprising the short pitch signal comprises:

detecting based on a parameter for detecting lack of very low frequency energy or a parameter for spectral sharpness.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Dec 22, 2025
From: DOLBY LABORATORIES INTERNATIONAL SERVICES (BEIJING) CO., LTD.
To: DOLBY INTERNATIONAL AB
Reel/Frame 074019/0868 →
NUNC PRO TUNC ASSIGNMENT Recorded Aug 7, 2025
From: HUAWEI TECHNOLOGIES CO., LTD.
To: DOLBY LABORATORIES INTERNATIONAL SERVICES (BEIJING) CO., LTD.
Reel/Frame 072400/0611 →
Continuity (5)
Continuation 15784802 · Oct 16, 2017
Continuation 15592573 · May 11, 2017
Continuation 14511943 · Oct 10, 2014
Provisional Application 62029437 · Jul 26, 2014
Related Publication 20200234724A1 · Jul 23, 2020