Semiconductor device
Provided is a semiconductor device comprising an active region on a substrate and including first and second sidewalls extending in a first direction and an epitaxial pattern on the active region, wherein the epitaxial pattern includes first and second epitaxial sidewalls extending from the first and second sidewalls, respectively, the first epitaxial sidewall includes a first epitaxial lower sidewall, a first epitaxial upper sidewall, and a first epitaxial connecting sidewall connecting the first epitaxial lower sidewall and the first epitaxial upper sidewall, the second epitaxial sidewall includes a second epitaxial lower sidewall, a second epitaxial upper sidewall, and a second epitaxial connecting sidewall connecting the second epitaxial lower sidewall and the second epitaxial upper sidewall, a distance between the first and second epitaxial upper sidewalls decreases away from the active region, and the first and second epitaxial lower sidewalls extend in parallel to a top surface of the substrate.
1. A semiconductor device comprising:
a first active region disposed in a first region of a substrate and including first and second sidewalls which extend in a first direction;
a second active region disposed in a second region of the substrate and including third and fourth sidewalls which extend in a second direction;
a first epitaxial pattern disposed on the first active region; and
a second epitaxial pattern disposed on the second active region,
wherein the first epitaxial pattern includes first and second epitaxial sidewalls which extend from the first and second sidewalls, respectively, of the first active region,
wherein the first epitaxial sidewall includes a first epitaxial lower sidewall, a first epitaxial upper sidewall, and a first epitaxial connecting sidewall which connects the first epitaxial lower sidewall and the first epitaxial upper sidewall,
wherein the second epitaxial sidewall includes a second epitaxial lower sidewall, a second epitaxial upper sidewall, and a second epitaxial connecting sidewall which connects the second epitaxial lower sidewall and the second epitaxial upper sidewall,
wherein the second epitaxial pattern includes third and fourth epitaxial sidewalls which extend from the third and fourth sidewalls, respectively, of the second active region,
wherein the third epitaxial sidewall includes a third epitaxial lower sidewall and a third epitaxial upper sidewall which is directly connected to the third epitaxial lower sidewall,
wherein the fourth epitaxial sidewall includes a fourth epitaxial lower sidewall and a fourth epitaxial upper sidewall which is directly connected to the fourth epitaxial lower sidewall,
wherein the first to fourth epitaxial upper sidewalls and the third and fourth epitaxial lower sidewalls are formed by crystal planes included in a first crystal plane group, and
wherein the first and second epitaxial lower sidewalls are formed by crystal planes included in a second crystal plane group,
wherein the first crystal plane group is one of a {111} crystal plane group, a {110} crystal plane group, or a {100} crystal plane group,
wherein the second crystal plane group is one of a {111} crystal plane group, a {110} crystal plane group, or a {100} crystal plane group, and is different from the first crystal plane group.
2. The semiconductor device of claim 1 , wherein the first crystal plane group is a {111} crystal plane group.
3. The semiconductor device of claim 1 , wherein the first and second epitaxial connecting sidewalls are formed by crystal planes included in a third crystal plane group which is different from the first and second crystal plane groups.
4. The semiconductor device of claim 1 , wherein a width of the first active region in a third direction that intersects the first direction is greater than a width of the second active region in a fourth direction that intersects the second direction.
5. The semiconductor device of claim 1 , wherein the first and second regions are P-type metal oxide semiconductor (PMOS) regions.
6. The semiconductor device of claim 1 ,
wherein a distance between the first and second epitaxial sidewalls in a third direction intersecting the first direction decreases as a distance from the first active region increases in a fourth direction, which is perpendicular to the first and third direction, and
wherein a distance between the third and fourth epitaxial sidewalls in a fifth direction intersecting the second direction decreases as a distance from the second active region increases in a sixth direction, which is perpendicular to the second and fifth direction.
7. The semiconductor device of claim 6 , wherein each of the first and second epitaxial lower sidewalls are parallel to a top surface of the substrate.
8. The semiconductor device of claim 1 , wherein the first active region includes a planar top surface which connects the first and second sidewalls.
9. The semiconductor device of claim 1 ,
wherein the first and second epitaxial connecting sidewalls are formed by crystal planes included in a third crystal plane group, and
wherein the third crystal plane group is one of a {111} crystal plane group, a {110} crystal plane group, or a {100} crystal plane group, and is different from the first and second crystal plane groups.