System and a method for controlling timing of processing network data
Embodiments of the invention relate to methods and systems for processing a network data block. One or more embodiments of the invention include receiving network data at a receiver/transmitter comprising a serializer/deserializer (SERDES). One or more embodiments of the invention include identifying, by the PHY, a start of a data block within the network data. One or more embodiments of the invention include performing, by the SERDES and after identifying the start of the data block, a SERDES action to obtain a SERDES data block. In one or more embodiments of the invention, the SERDES action is based on an encoding scheme used in transmission of the network data. One or more embodiments of the invention include also includes transmitting the SERDES data block towards a receiver.
1. A method for processing a network data block, the method comprising:
receiving network data at a receiver/transmitter comprising a serializer/deserializer (SERDES) comprising a plurality of shift registers arranged in a hierarchy of at least two layers;
identifying a start of a data block within the network data;
performing, by the SERDES and after identifying the start of the data block, a SERDES action to obtain a SERDES data block, wherein the SERDES action is based on an encoding scheme used in transmission of the network data; and
transmitting the SERDES data block towards a receiver.
2. The method of claim 1 , wherein the SERDES action is a deserialization of serial data received from a physical medium and transmitted as a parallel data block to an encoder/decoder.
3. The method of claim 1 , wherein the SERDES action is a serialization of parallel data received from an encoder/decoder and transmitted to a remote device via a physical medium.
4. The method of claim 1 , wherein the data block includes a first number of bits, and the SERDES data block includes a second number of bits that is a factor of the first number of bits.
5. The method of claim 1 , wherein the SERDES is implemented using a plurality of shift registers.
6. The method of claim 1 , wherein the plurality of shift registers comprises a first set of shift registers and a second set of shift registers arranged in the hierarchy.
7. The method of claim 1 , wherein the SERDES has a one to thirty-three (1:33) SERDES ratio.
8. The method of claim 1 , wherein the SERDES has a one to twenty-two (1:22) SERDES ratio.
9. The method of claim 1 , wherein identifying the start of the data block within the network data comprises monitoring a plurality of data blocks in a data stream during a training period.
10. The method of claim 1 , wherein the receiver/transmitter is a physical layer (PHY) and the PHY comprises a physical medium attachment sublayer that comprises the SERDES.
11. The method of claim 10 , wherein the PHY further comprises a physical coding sublayer that comprises an encoder/decoder.
12. A system for processing a network data block, the system comprising:
a receiver/transmitter comprising a serializer/deserializer (SERDES) and configured to:
receive network data; and
identify a start of a data block within the network data; and
the SERDES configured to:
perform, after identifying the start of the data block, a SERDES action to obtain a SERDES data block, wherein the SERDES action comprises serializing or deserializing the data block using a SERDES ratio that is based on an encoding scheme used in transmission of the network data; and
transmit the SERDES data block towards a receiver.
13. The system of claim 12 , wherein the system further comprises an encoder/decoder, and wherein the SERDES action is a deserialization of serial data received from physical medium and transmitted as a parallel data block to the encoder/decoder.
14. The system of claim 12 , wherein the SERDES action is a serialization of parallel data received from an encoder/decoder and transmitted to a remote device via a physical medium.
15. The system of claim 12 , wherein the data block includes a first number of bits, and the SERDES data block includes a second number of bits that is a factor of the first number of bits.
16. The system of claim 12 , wherein the SERDES is implemented using a plurality of shift registers.
17. The system of claim 16 , wherein the plurality of shift registers comprises a first set of shift registers and a second set of shift registers arranged in a hierarchy.
18. The system of claim 12 , wherein the encoding scheme is 64/66b and the SERDES has a one to thirty-three (1:33) SERDES ratio.
19. The system of claim 12 , wherein the encoding scheme is 64/66b and the SERDES has a one to twenty-two (1:22) SERDES ratio.
20. The system of claim 12 , wherein the receiver/transmitter is configured to identify the start of the data block by monitoring a plurality of data blocks in a data stream during a training period.
21. The system of claim 12 , wherein the receiver/transmitter is a physical layer (PHY) and the PHY comprises a physical medium attachment sublayer that comprises the SERDES.
22. The system of claim 21 , wherein the PHY further comprises a physical coding sublayer that comprises an encoder/decoder.