IP Library › Granted Patent US 11,010,527
Granted Patent B2
US 11,010,527 · App. 16/756,145 · Granted May 18, 2021

Optimization of a quantum circuit by inserting swap gates

Inventors: Simon Martiel (Montrouge, FR); Elise Rubat Ciagnus (Rouen, FR)
Assignee: BULL SAS
G06F30/392G06F30/394G06F30/398G06N10/00G06F2119/12
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Quick Facts
Patent No.
US 11,010,527
App. No.
16/756,145
Granted
May 18, 2021
Kind
B2
Abstract

Disclosed is a method for optimizing a quantum circuit of an ordered series of quantum gates, applied to an initial layout of qubit values, consisting in inserting a set of local SWAP gates so that all gates of the circuit are local, the method including: for each gate, if it is not local, inserting a set of local SWAP gates; determining the set of permutations, each consisting of a succession of swaps of qubit values along shortest paths between positions of qubits associated with the gate; and choosing, from the permutations, a permutation that minimizes a cost representing the number of swaps necessary to make the gates of a sequence within the series, of substantially smaller size, local; re-establishing the initial layout by establishing a tree covering a graph representative of the layout of the qubits of the circuit, and by swapping qubit values along paths of the tree.

Claims (30)

1. Method for optimizing a quantum circuit composed of an ordered series of quantum gates applied to an initial layout of qubit values, consisting of inserting a set of local SWAP gates so that all the gates of said quantum circuit are local, comprising steps consisting of:

inserting, for each quantum gate of said series if the gate is not local, a set of local SWAP gates before said quantum gate,

determining (S 4 ) the set of permutations, each consisting of a succession of swaps of qubit values along the shortest paths between the positions of qubits associated with said quantum gate, and

choosing (S 5 ), from said set of permutations, a permutation minimizing a cost representing the number of swaps required to make local the quantum gates of a sequence within said series, the size of said sequence being substantially less than that of said series;

restoring (S 7 ) said initial layout by establishing a spanning tree of a graph representative of the layout of the qubits of said circuit, and by performing swaps of qubit values along paths of said tree.

2. The method according to claim 1 , without which the determination (S 4 ) of the set of permutations is carried out by

determining a succession of swaps of qubit values along first shortest paths between any pair of positions of qubits associated with said quantum gate, then,

and if said quantum gate has more than two positions of qubits so associated, determining a succession of swaps of qubit values along second shortest paths between each of the positions, aside from those already considered, and the first shortest paths already determined.

3. The method according to claim 1 , wherein said cost takes into account a cost attached to each type of SWAP gate to be inserted.

4. The method according to claim 1 , wherein the initial layout is restored using a token swapping algorithm.

5. The method according to claim 1 , wherein the size of said sequence is between 3 and 5.

6. The method according to claim 1 , wherein said shortest paths are determined by precalculating the shortest paths between all the vertices of said graph.

7. The method according to claim 6 , wherein said shortest paths are calculated by Dijsktra's algorithm.

8. A non-transitory computer-readable medium on which is stored a computer program comprising instructions which, when executed by a processor of a computer system, result in implementing a method according to claim 1 .

9. Platform for optimizing a quantum circuit composed of an ordered series of quantum gates applied to an initial layout of qubit values, consisting of inserting a set of local SWAP gates so that all the gates of said quantum circuit are local, comprising digital processing means for

inserting, for each quantum gate of said series if the gate is not local, a set of local SWAP gates before said quantum gate,

determining the set of permutations, each consisting of a succession of swaps of qubit values along the shortest paths between the qubit positions associated with said quantum gate, and

choosing, from said set of permutations, a permutation minimizing a cost representing the number of swaps required to make local the quantum gates of a sequence within said series, the size of said sequence being substantially smaller than that of said series;

restoring said initial layout by establishing a spanning tree of a graph representative of the layout of qubits of said circuit, and by swapping qubit values along paths of said tree.

10. The method according to claim 2 , wherein said cost takes into account a cost attached to each type of SWAP gate to be inserted.

11. The method according to claim 2 , wherein the initial layout is restored using a token swapping algorithm.

12. The method according to claim 3 , wherein the initial layout is restored using a token swapping algorithm.

13. The method according to claim 2 , wherein the size of said sequence is between 3 and 5.

14. The method according to claim 3 , wherein the size of said sequence is between 3 and 5.

15. The method according to claim 4 , wherein the size of said sequence is between 3 and 5.

16. The method according to claim 2 , wherein said shortest paths are determined by precalculating the shortest paths between all the vertices of said graph.

17. The method according to claim 3 , wherein said shortest paths are determined by precalculating the shortest paths between all the vertices of said graph.

18. The method according to claim 4 , wherein said shortest paths are determined by precalculating the shortest paths between all the vertices of said graph.

19. The method according to claim 5 , wherein said shortest paths are determined by precalculating the shortest paths between all the vertices of said graph.

20. A non-transitory computer-readable medium on which is stored a computer program comprising instructions which, when executed by a processor of a computer system, result in implementing a method according to claim 2 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2020
From: MARTIEL, SIMON; RUBAT CIAGNUS, ELISE
To: BULL SAS
Reel/Frame 054054/0293 →
Priority Claims (1)
FR 1759684 · Oct 16, 2017 · national
Continuity (1)
Related Publication 20200242295A1 · Jul 30, 2020
Cited By (2)
US 12,204,879 US 12,675,718