IP Library Granted Patent US 11,316,013
Granted Patent B2
US 11,316,013 · App. 16/776,010 · Granted Apr 26, 2022

Nitride semiconductor device

Inventor: Katsunori Ueno (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/0696H01L29/086H01L29/41741H01L29/7813
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,316,013
App. No.
16/776,010
Granted
Apr 26, 2022
Kind
B2
Abstract

A nitride semiconductor device includes a nitride semiconductor layer, channel cells in the nitride semiconductor layer, a source lead region of a second conductivity type in the nitride semiconductor layer, and a source electrode on a side where a first main surface of the nitride semiconductor layer is located. The channel cells each include a well region of a first conductivity type and a source region of the second conductivity type in contact with the well region. The source lead region is connected to the source region. The channel cells extend in a first direction in a planar view from a normal direction of the first main surface, and arranged in a second direction intersecting with the first direction in the planar view. The source electrode is in contact with the source lead region away from a line of the channel cells arranged in the second direction.

Claims (52)

1. A nitride semiconductor device, comprising:

a nitride semiconductor layer;

a plurality of channel cells provided in the nitride semiconductor layer and each including a well region of a first conductivity type and a source region of a second conductivity type in contact with the well region;

a source lead region of the second conductivity type provided in the nitride semiconductor layer and connected to the source region; and

a source electrode provided on a side where a first main surface of the nitride semiconductor layer is located,

wherein

the plurality of channel cells extend in a first direction in a planar view from a normal direction of the first main surface, and are arranged in a second direction intersecting with the first direction in the planar view,

the source electrode is in contact with the source lead region in a position spaced apart from a line of the plurality of channel cells which are arranged in the second direction, and

the source region and the source lead region are located on the well region and in contact with the well region.

2. The nitride semiconductor device according to claim 1 , wherein the source lead region extends in the second direction.

3. The nitride semiconductor device according to claim 1 , further comprising a gate electrode provided on the side where the first main surface is located, the gate electrode extending in the second direction to straddle the plurality of channel cells.

4. The nitride semiconductor device according to claim 3 , further comprising a trench provided in the nitride semiconductor layer and located between the plurality of channel cells and a gate insulating film provided on side faces of the trench, wherein the gate electrode includes an electrode portion provided in the trench and adjacent to the channel cells via the gate insulating film.

5. The nitride semiconductor device according to claim 4 , further comprising:

a first insulating film provided on a bottom surface of the trench; and

an impurity region of the first conductivity type provided below the trench in the nitride semiconductor layer and directly adjacent to the first insulating film.

6. The nitride semiconductor device according to claim 3 , further comprising a gate insulating film provided on the plurality of channel cells, the gate electrode being provided on the gate insulating film.

7. The nitride semiconductor device according to claim 6 , wherein the gate insulating film includes a first portion located on the well region and a second portion located on the source region between the source region and the source electrode in a depth direction, the second portion having a larger film thickness than the first portion.

8. The nitride semiconductor device according to claim 1 , further comprising:

an impurity region of the first conductivity type provided in the nitride semiconductor layer and in contact with the source lead region,

wherein

the impurity region has a higher first conductivity type impurity concentration than the well region, and is deeper in depth from the first main surface side than the well region, and

the source electrode is in contact with the impurity region at the position spaced apart the line of the plurality of channel cells which are arranged in the second direction.

9. The nitride semiconductor device according to claim 1 , further comprising:

a drift region of the second conductivity type provided in the nitride semiconductor layer; and

an impurity region of the second conductivity type provided in the nitride semiconductor layer and located between the channel cells and the drift region,

wherein the impurity region has a higher second conductivity type impurity concentration than the drift region.

10. The nitride semiconductor device according to claim 1 , further comprising:

an impurity region of the first conductivity type provided in the nitride semiconductor layer and in contact with the source lead region,

wherein

the impurity region has a higher first conductivity type impurity concentration than the well region, and is deeper in depth from the first main surface side than the well region.

11. The nitride semiconductor device according to claim 1 , further comprising:

an impurity region of the first conductivity type provided in the nitride semiconductor layer,

wherein

the impurity region contacts the source lead region and contacts the source electrode, and

the impurity region has a higher first conductivity type impurity concentration than the well region, and is deeper in depth from the first main surface side than the well region.

12. The nitride semiconductor device according to claim 1 , further comprising:

a gate electrode provided on the side where the first main surface is located, the gate electrode extending in the second direction to straddle the plurality of channel cells;

a trench provided in the nitride semiconductor layer and located between the plurality of channel cells, wherein the gate electrode includes an electrode portion provided in the trench and adjacent to the channel cells;

a drift region of the second conductivity type provided in the nitride semiconductor layer; and

an impurity region of the first conductivity type provided between a bottom of the trench and a portion of the drift region.

13. The nitride semiconductor device according to claim 1 , wherein the nitride semiconductor device is a vertical metal oxide semiconductor field effect transistor.

14. A nitride semiconductor device comprising:

a nitride semiconductor layer;

a plurality of channel cells provided in the nitride semiconductor layer and each including a well region of a first conductivity type and a source region of a second conductivity type in contact with the well region;

a source lead region of the second conductivity type provided in the nitride semiconductor layer and connected to the source region;

a source electrode provided on a side where a first main surface of the nitride semiconductor layer is located;

a drift region of the second conductivity type provided in the nitride semiconductor layer, wherein the drift region extends to the first main surface of the nitride semiconductor layer; and

a metal film provided directly on the drift region,

wherein

the plurality of channel cells extend in a first direction in a planar view from a normal direction of the first main surface, and are arranged in a second direction intersecting with the first direction in the planar view,

the source electrode contacts the source lead region, and

the source electrode contacts the metal film at a position spaced apart from a line of the plurality of channel cells which are arranged in the second direction, so as to form a Schottky barrier diode between the metal film and the drift region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2020
From: UENO, KATSUNORI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 051675/0946 →
Priority Claims (1)
JP JP2019-118277 · Jun 26, 2019 · national
Continuity (1)
Related Publication 20200411642A1 · Dec 31, 2020