IP Library Granted Patent US 11,625,191
Granted Patent B2
US 11,625,191 · App. 16/779,472 · Granted Apr 11, 2023

Apparatuses, systems, and methods for heating a memory device

Inventors: Arash Hazeghi (San Jose, CA); Pranav Kalavade (San Jose, CA); Rohit Shenoy (Fremont, CA); Krishna Parat (Palo Alto, CA)
Assignee: Intel Corporation
G06F3/0659G05B19/406G06F3/0619G06F3/0679G05B2219/50333
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Quick Facts
Patent No.
US 11,625,191
App. No.
16/779,472
Granted
Apr 11, 2023
Kind
B2
Abstract

An apparatus and/or system is described including a memory device or a controller for the memory device to perform heating of the memory device. In embodiments, a controller is to receive a temperature of the memory device and determine that the temperature is below a threshold temperature. In embodiments, the controller activates a heater for one or more memory die to assist the memory device in moving the temperature towards the threshold temperature, to assist the memory device when reading data. In embodiments, the heater comprises a plurality of conductive channels included in the one or more memory die or other on-board heater. Other embodiments are disclosed and claimed.

Claims (48)

1. A solid-state drive (SSD), comprising:

a memory device, wherein the memory device includes a plurality of memory die; and

a controller coupled to the memory device, wherein the controller is to:

receive an indication of a temperature of the memory device;

determine that the temperature of the memory device is below a threshold temperature;

identify a memory die of the plurality of memory die, wherein the identification is based on an identification that the memory die is unusable for a future read or write operation; and

activate substantially all bit-lines of the memory die by increasing a plurality of bit-line pre-charge currents to move the temperature of the memory device closer to the threshold temperature.

2. The SSD of claim 1 , wherein to move the temperature of the memory device closer to the threshold temperature includes to move the temperature of the memory device from a cold ambient temperature to a warm ambient temperature.

3. The SSD of claim 1 , wherein the controller is to activate the substantially all bit-lines by issuing a command to the one or more memory die of the plurality to switch the one or more memory die to a self-heating mode.

4. The SSD of claim 3 , wherein the controller is further to:

issue a command to deactivate the substantially all bit-lines once the temperature reaches an upper threshold.

5. The SSD of claim 4 , wherein to deactivate the self-heating mode includes to turn the substantially all bit lines in the memory die off.

6. The SSD of claim 1 , wherein the identification that the memory die is unusable for a future read or write operation is based on an identification that the memory die is retired.

7. A method, comprising:

receiving, by a memory controller, an indication of a temperature of a memory device;

determining, by the memory controller, that the temperature of the memory device is below a threshold temperature;

identifying, by the memory controller, a memory die of a plurality of memory die of the memory device, wherein identifying the memory die is based on identifying which memory die of the plurality of memory die is unusable for a future read or write operation; and

activating, by the memory controller, a heater for the memory die to assist the memory device in reading data by moving the temperature of the memory device closer to the threshold temperature.

8. The method of claim 7 , wherein activating, by the memory controller, the heater, includes issuing a command to the memory die to switch the memory die to a self-heating mode.

9. The method of claim 7 , wherein the heater comprises one or more conductive channels included in the memory die.

10. The method of claim 9 , wherein the conductive channels include a plurality of pillars, and the self-heating mode includes an activation of substantially all pillars in the plurality of pillars in the memory die.

11. The method of claim 10 , wherein the activation of substantially all the pillars includes increasing a plurality of bit-line pre-charge currents.

12. The method of claim 7 , wherein activating, by the memory controller, the heater includes moving a read temperature of the memory device closer to a previous write temperature of the memory device or moving a write temperature of the memory device closer to a read temperature of the memory device.

13. The method of claim 7 , wherein identifying which memory die of the plurality of memory die is unusable for a future read or write operation is based on identifying a memory die that is defective.

14. A system, comprising:

a processor; and

a solid-state drive (SSD) coupled with the processor, wherein the SSD includes:

a memory device that includes a plurality of memory die; and

a memory controller coupled to the memory device, wherein the memory controller is to:

identify a temperature of the memory device;

determine that the temperature of the memory device is below a threshold temperature;

identify a memory die of the plurality of memory die, wherein the identification is based on an identification that the memory die is unusable for a future read or write operation; and

activate substantially all bit-lines of the memory die by increasing a plurality of bit-line pre-charge currents to move the temperature of the memory device closer to the threshold temperature.

15. The system of claim 14 , wherein the memory device is a 3D NAND memory device.

16. The system of claim 14 , wherein the controller is to activate the substantially all bit-lines by issuing a command to the memory die to switch the memory die to a self-heating mode.

17. The system of claim 14 , wherein the memory controller is to identify that the memory die is unusable for a future read or write operation based on an identification that the memory die is rejected.

18. A computing system, comprising:

a memory device that includes a plurality of memory die;

a controller coupled to the memory device, wherein the controller is to:

identify a temperature of the memory device;

determine that the temperature of the memory device is below a threshold temperature;

identify a memory die of the plurality of memory die based on an identification of which memory die of the plurality of memory die is unusable for a future read or write operation; and

activate a heater for the memory die to assist the memory device in reading data from one or more of the plurality of memory die by moving a temperature of the memory device closer to the threshold temperature; and

a display, communicatively coupled to a processor to display data stored in the memory device.

19. The computing system of claim 18 , wherein the controller is to activate the heater by issuing a command to the memory die to switch the memory die to a self-heating mode.

20. The computing system of claim 18 , wherein the heater comprises a plurality of conductive channels included in the memory die.

21. The computing system of claim 18 , wherein the heater is a heater external to the memory device.

22. The computing system of claim 18 , wherein identifying which memory die of the plurality of memory die is unusable for a future read or write operation is based on identifying which die of the plurality of memory die is retired, defective, or rejected.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2023
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 064928/0832 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2020
From: HAZEGHI, ARASH; KALAVADE, PRANAV; SHENOY, ROHIT; PARAT, KRISHNA
To: INTEL CORPORATION
Reel/Frame 051691/0043 →