Apparatus including multiple channel materials, and related methods, memory devices, and electronic systems

1. An apparatus, comprising:

a stack comprising an alternating sequence of dielectric structures and conductive structures;

a first channel material comprising substantially linear sidewalls extending vertically through the stack, the first channel material having a first band gap;

a second channel material adjacent to the first channel material and comprising substantially linear sidewalls extending vertically through the stack along an entire height of the first channel material, the second channel material having a second band gap that is relatively larger than the first band gap;

an oxide-nitride-oxide (ONO) structure comprising substantially linear sidewalls directly laterally adjacent to the first channel material, wherein lower surfaces of the first channel material and the second channel material are vertically elevated relative to a lower surface of the ONO structure;

a conductive plug structure adjacent to each of the first channel material and the second channel material; and

a conductive line structure adjacent to the conductive plug structure.

2. The apparatus of claim 1 , wherein the conductive plug structure comprises a conductive material having a third band gap, the second band gap being larger than each of the first band gap and the third band gap.

3. The apparatus of claim 2 , wherein the third band gap is substantially equal to the first band gap.

4. The apparatus of claim 1 , wherein:

an interface between the second channel material and the first channel material comprises a heterojunction; and

another interface between the conductive plug structure and the first channel material comprises a homojunction.

5. The apparatus of claim 1 , wherein each of the conductive plug structure, the first channel material, and the second channel material comprises an n-type dopant, the second channel material having a greater concentration of the n-type dopant than the conductive plug structure.

6. The apparatus of claim 1 , wherein the first channel material is conductive to both electrons and holes, and the second channel material is conductive to electrons and is not conductive to holes, the second channel material having a relatively higher electron mobility than an electron mobility of the first channel material.

7. The apparatus of claim 1 , wherein:

the second channel material laterally extends between sidewalls of the first channel material;

upper surfaces of the first channel material and the second channel material are substantially coplanar with one another; and

the conductive plug structure is in direct physical contact with each of the first channel material and the second channel material.

8. The apparatus of claim 1 , wherein the first channel material comprises a polycrystalline silicon material and the second channel material comprises an oxide semiconductor material, the first channel material directly physically contacting and substantially surrounding the second channel material along the entire height thereof.

9. An apparatus, comprising:

a first channel material of a channel structure extending vertically through a stack of alternating dielectric structures and conductive structures;

a second channel material of the channel structure adjacent to the first channel material and extending vertically through the stack, wherein a band gap of the second channel material is relatively larger than a band gap of the first channel material, each of the first channel material and the second channel material of the channel structure comprising substantially straight sidewalls along a height thereof, and lower surfaces of the first channel material and the second channel material are substantially coplanar with one another;

a conductive plug structure adjacent to the first channel material and the second channel material; and

an oxide-nitride-oxide (ONO) material directly contacting the substantially straight sidewalls of the first channel material along the height of the first channel material, the lower surfaces of the first channel material and the second channel material elevated relative to a lower surface of the ONO material.

10. The apparatus of claim 9 , wherein outer sidewalls of the conductive plug structure are substantially coplanar with outer sidewalls of the first channel material.

11. The apparatus of claim 9 , further comprising a central dielectric material adjacent to the second channel material and extending vertically through the stack, wherein a width of the first channel material is substantially equal to a width of the second channel material, and a width of the central dielectric material is greater than a combined width of the first channel material and the second channel material.

12. The apparatus of claim 11 , wherein the width of the first channel material is between about 1 nm and about 20 nm, the width of the second channel material is between about 1 nm and about 20 nm, and the width of the central dielectric material is between about 20 nm and about 100 nm.

13. The apparatus of claim 9 , wherein:

the first channel material comprises a first dopant comprising phosphorous or arsenic; and

the second channel material comprises a second dopant comprising aluminum or silicon, the second channel material being substantially entirely free of phosphorous and arsenic.

14. A method of forming an apparatus, comprising:

forming an opening through a stack of alternating conductive structures and dielectric structures;

forming an oxide-nitride-oxide (ONO) structure comprising substantially linear sidewalls within the opening;

forming a first channel material within the opening and directly laterally adjacent to the ONO structure, the first channel material comprising substantially linear sidewalls extending vertically through the stack;

forming a second channel material adjacent to the first channel material within the opening and comprising substantially linear sidewalls extending vertically through the stack along an entire height of the first channel material, lower surfaces of the first channel material and the second channel material vertically elevated relative to a lower surface of the ONO structure;

forming a conductive plug structure within the opening and adjacent to each of the first channel material and the second channel material, a second band gap of the second channel material relatively larger than a first band gap of the first channel material; and

forming a conductive line structure adjacent to the conductive plug structure.

15. The method of claim 14 , wherein forming the first channel material within the opening comprises conformally forming the first channel material on sidewalls of the stack, the opening having a substantially cylindrical shape.

16. The method of claim 14 , wherein forming the second channel material comprises:

non-conformally forming the second channel material on sidewalls of the first channel material; and

removing portions of the first channel material and the second channel material within the opening to recess the first channel material and the second channel material below an upper surface of an uppermost conductive material of the stack.

17. The method of claim 14 , further comprising forming a central dielectric material on sidewalls of the second channel material and within the opening.

18. The method of claim 14 , wherein forming the first channel material and forming the second channel material comprises epitaxially growing at least one of the first channel material and the second channel material within the opening.

19. The method of claim 14 , wherein forming the second channel material comprises selecting the second channel material to have a band gap larger than a band gap of the conductive plug structure.

20. A memory device, comprising:

access lines extending in a first lateral direction;

data lines extending in a second lateral direction, substantially transverse to the first lateral direction; and

memory cells proximate intersections of the access lines and the data lines, the memory cells comprising:

a first channel material having a first band gap;

a second channel material having a second band gap that is relatively larger than the first band gap, the second channel material laterally adjacent to the first channel material with lower surfaces of the second channel material substantially coplanar with lower surfaces of the first channel material;

a conductive plug adjacent to the first channel material and the second channel material; and

an oxide-nitride-oxide (ONO) structure comprising substantially linear sidewalls laterally contacting sidewalls of the first channel material, a lower surface of the ONO structure at an elevational level below the lower surfaces of the first channel material and the second channel material.

21. The memory device of claim 20 , wherein the conductive plug and an additional conductive plug are in direct contact with each of the first channel material and the second channel material.

22. The memory device of claim 20 , further comprising a central dielectric material laterally adjacent to the second channel material, wherein the first channel material comprises a polycrystalline silicon material, the second channel material comprises an oxide semiconductor material, and the central dielectric material comprises an oxide material.

23. The memory device of claim 20 , wherein the first band gap of the first channel material is between about 0.4 eV and about 1.4 eV, and the second band gap of the second channel material is between about 1.5 eV and about 4.0 eV.

24. The memory device of claim 20 , wherein the memory device comprises a three-dimensional NAND memory device.

25. An electronic system, comprising:

a processor; and

a microelectronic device operably coupled to the processor, the microelectronic device comprising:

vertical structures extending through a stack of alternating conductive materials and dielectric materials, each of the vertical structures comprising:

a channel structure comprising a crystalline material laterally adjacent to and substantially surrounding an amorphous material along a height thereof;

an oxide-nitride-oxide (ONO) structure comprising substantially linear sidewalls laterally adjacent to and substantially surrounding the channel structure, a lower surface of the ONO structure extending beyond a lower surface of the channel structure; and

a conductive plug structure adjacent to the channel structure, a band gap of the amorphous material of the channel structure relatively larger than band gaps of each of the crystalline material of the channel structure and the conductive plug structure;

data lines adjacent to the vertical structures; and

a conductive gate structure comprising an uppermost one of the conductive materials of the stack laterally adjacent to the vertical structures, the conductive plug structure at least partially vertically overlapping the conductive gate structure.

26. The apparatus of claim 1 , wherein end surfaces of the conductive structures proximate the first channel material are substantially aligned with one another.

27. The apparatus of claim 1 , wherein a lower portion of the conductive plug structure is laterally aligned with an upper portion of an uppermost one of the conductive structures of the stack.

28. The apparatus of claim 1 , wherein upper surfaces of the first channel material and the second channel material are vertically recessed relative to upper surfaces of the ONO structure.

29. The apparatus of claim 1 , wherein the conductive plug structure is directly laterally adjacent to the ONO structure, outer sidewalls of each of the first channel material and the conductive plug structure being coincident with inner sidewalls of the ONO structure.