IP Library › Granted Patent US 11,227,865
Granted Patent B2
US 11,227,865 · App. 16/782,354 · Granted Jan 18, 2022

Semiconductor device having buried word line and method of manufacturing the same

Inventor: Chih-Wei Huang (Taoyuan, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H01L27/10823H01L21/31116H01L21/7682H01L21/76224H01L21/76802H01L21/76843H01L23/5283H01L23/53295H01L27/10876H01L27/10891
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Quick Facts
Patent No.
US 11,227,865
App. No.
16/782,354
Granted
Jan 18, 2022
Kind
B2
Abstract

The present disclosure provides a semiconductor device. The semiconductor device can be a recessed access device (RAD) transistor, which includes a substrate, a word line disposed in the substrate and surrounded by a dielectric liner, an isolation layer disposed in the substrate to cap the word line, and an insulative plug penetrating through the isolation layer and extending into the word line.

Claims (14)

1. A semiconductor device, comprising:

a substrate;

a word line disposed in the substrate;

a dielectric liner disposed between the substrate and the word line;

an isolation layer disposed in the substrate to cap the word line; and

an insulative plug penetrating through the isolation layer and extending into the word line.

2. The semiconductor device of claim 1 , wherein the insulative plug and the word line are concentric.

3. The semiconductor device of claim 1 , wherein the word line has a first width, and the insulative plug has a second width less than the first width.

4. The semiconductor device of claim 3 , wherein the second width gradually decreases at positions of increasing distance from an upper surface of the substrate.

5. The semiconductor device of claim 1 , wherein the insulative plug is entirely surrounded by the isolation layer.

6. The semiconductor device of claim 1 , wherein the insulative plug has a first dielectric constant, and the isolation layer has a second dielectric constant greater than the first dielectric constant.

7. The semiconductor device of claim 1 , further comprising a void introduced in the isolation layer.

8. The semiconductor device of claim 7 , wherein the void extends around a perimeter of the insulative plug.

9. The semiconductor device of claim 1 , further comprising a plurality of impurity regions in the substrate and disposed on either side of the word line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2020
From: HUANG, CHIH-WEI
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 051726/0784 →
Continuity (1)
Related Publication 20210242211A1 · Aug 5, 2021
Cited By (1)
US 12,363,891