IP Library Granted Patent US 11,070,778
Granted Patent B2
US 11,070,778 · App. 16/785,305 · Granted Jul 20, 2021

Multi-projector display architecture

Inventors: Larry Seiler (Redmond, WA); William Thomas Blank (Bellevue, WA); Warren Andrew Hunt (Woodinville, WA); Michael Yee (Kirkland, WA)
Assignee: Facebook Technologies, LLC
H04N9/3182G02B27/0172G09G3/32H04N9/3185G02B2027/0178
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,070,778
App. No.
16/785,305
Granted
Jul 20, 2021
Kind
B2
Abstract

In an embodiment, a headset display device includes a central processor and multiple projector integrated circuits each coupled to the central processor and configured to process image data. Each projector integrated circuit includes multiple first integrated circuits, each including a light emitter array. Each projector integrated circuit includes a second integrated circuit coupled to the multiple first integrated circuits. The second integrated circuit includes a graphics processor configured to generate transformed image data correcting for geometrical or brightness distortions and (2) is configured to provide the transformed image data to the multiple first integrated circuits for display.

Claims (40)

1. A headset display device comprising a central processor and a plurality of projector integrated circuits for each eye of a wearer of the headset display device, wherein each projector integrated circuit is coupled to the central processor, wherein each projector integrated circuit is configured to process image data and generate output image data for display, and wherein each projector integrated circuit comprises:

a plurality of first integrated circuits, each of the plurality of first integrated circuits comprising a light emitter array; and

a second integrated circuit coupled to the plurality of first integrated circuits, wherein the second integrated circuit (1) comprises a graphics processor configured to generate transformed image data correcting for geometrical or brightness distortions and (2) is configured to provide the transformed image data to the plurality of first integrated circuits, wherein the plurality of first integrated circuits are configured to output the transformed image data using the respective light emitter array.

2. The headset display device of claim 1 , wherein:

the central processor is configured to receive, from a first rendering device, data for images to be displayed by the headset display device;

the headset display device is configured to process the received data using the plurality of projector integrated circuits; and

the plurality of projector integrated circuits are configured to produce, using the light emitter array of each projector integrated circuit, light based on the processed data.

3. The headset display device of claim 2 , wherein the headset display device further comprises a waveguide configuration; and

wherein the light produced by the light emitter array of each projector integrated circuit is directed through the waveguide configuration to a wearer of the headset display device.

4. The headset display device of claim 2 , wherein the data for images to be displayed by the headset display device is received from the first rendering device at a first rate and the received data is processed using the plurality of projector integrated circuits at a second rate, the second rate being greater than the first rate.

5. The headset display device of claim 2 , wherein the first rendering device is in wireless communication with the headset display device.

6. The headset display device of claim 1 , wherein the second integrated circuit is further configured to:

perform dithering or non-uniformity corrections on received image data prior to providing the transformed image data to the plurality of first integrated circuits for display.

7. The headset display device of claim 6 , wherein the second integrated circuit further comprises a display driver configured to perform the dithering or non-uniformity corrections.

8. The headset display device of claim 1 , wherein the plurality of first integrated circuits further comprise a backplane for the light emitter array that is configured to generate instructions for powering the light emitter array to cause light emitters of the light emitter array to produce light based on the transformed image data.

9. The headset display device of claim 1 , wherein the graphics processor is further configured to generate transformed image data based on a current viewpoint.

10. The headset display device of claim 9 , wherein the headset display device further comprises a movement sensor or orientation sensor; and

wherein the current viewpoint is determined based on data received from the movement sensor or orientation sensor.

11. The headset display device of claim 1 , wherein the geometrical or brightness distortions stem from a near eye display optical system of the headset display device.

12. The headset display device of claim 1 , wherein the graphics processor is further configured to apply geometric transformations to received image data to correct chromatic aberrations.

13. The headset display device of claim 1 , wherein the graphics processor comprises:

a transform block configured to determine, based on a current viewpoint, visibility information for virtual objects to be displayed in an artificial reality scene;

a pixel block configured to determine color values based on determined visibility information; or

a display block configured to prepare determined color values for output to a display driver.

14. The headset display device of claim 1 , wherein each light emitter array is composed of monochrome light emitters.

15. The headset display device of claim 1 , wherein each light emitter array comprises μLEDs.

16. The headset display device of claim 1 , wherein the headset display device comprises four projector integrated circuits.

17. The headset display device of claim 1 , wherein each projector integrated circuit generates light for a portion of a field of vision of the wearer of the headset display device.

18. A method comprising:

receiving, from a first rendering device, data for images to be displayed by a headset display device, wherein the headset display device comprises:

a central processor and a plurality of projector integrated circuits for each eye of a wearer of the headset display device, wherein each projector integrated circuit is coupled to the central processor, wherein each projector integrated circuit is configured to process image data and generate output image data for display, and wherein each projector integrated circuit comprises:

a plurality of first integrated circuits, each of the plurality of first integrated circuits comprising a light emitter array; and

a second integrated circuit coupled to the plurality of first integrated circuits, wherein the second integrated circuit (1) comprises graphics processor configured to generate transformed image data correcting for geometrical or brightness distortions and (2) is configured to provide the transformed image data to the plurality of first integrated circuits, wherein the plurality of first integrated circuits are configured to output the transformed image data using the respective light emitter array; and

producing, using the light emitter array of each projector integrated circuit, light based on the received data.

19. One or more computer-readable non-transitory storage media embodying software that is operable when executed to:

receive, from a first rendering device, data for images to be displayed by a headset display device, wherein the headset display device comprises:

a central processor and a plurality of projector integrated circuits for each eye of a wearer of the headset display device, wherein each projector integrated circuit is coupled to the central processor, wherein each projector integrated circuit is configured to process image data and generate output image data for display, and wherein each projector integrated circuit comprises:

a plurality of first integrated circuits, each of the plurality of first integrated circuits comprising a light emitter array; and

a second integrated circuit coupled to the plurality of first integrated circuits, wherein the second integrated circuit (1) comprises graphics processor configured to generate transformed image data correcting for geometrical or brightness distortions and (2) is configured to provide the transformed image data to the plurality of first integrated circuits, wherein the plurality of first integrated circuits are configured to output the transformed image data using the respective light emitter array; and

produce, using the light emitter array of each projector integrated circuit, light based on the received data.

Assignments (2)
CHANGE OF NAME Recorded Jul 6, 2022
From: FACEBOOK TECHNOLOGIES, LLC
To: META PLATFORMS TECHNOLOGIES, LLC
Reel/Frame 060591/0848 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2020
From: SEILER, LARRY; BLANK, WILLIAM THOMAS; HUNT, WARREN ANDREW; YEE, MICHAEL
To: FACEBOOK TECHNOLOGIES, LLC
Reel/Frame 052067/0495 →
Continuity (2)
Provisional Application 62805923 · Feb 14, 2019
Related Publication 20200267359A1 · Aug 20, 2020