Memory device and manufacturing methods thereof
View Patent ↗The memory device includes a conductive layer, a plurality of first electrode layers stacked over the conductive layer and spaced from each other in a first direction, a semiconductor layer extending through the first electrode layers in the first direction, a second electrode layer provided between the conductive layer and the first electrode layers, and a semiconductor base, located between the conductive layer and the semiconductor layer and extending through the second electrode layer, wherein the semiconductor base has a first width at a portion thereof extending through the second electrode layer in the first direction and second width at a portion thereof connected to the semiconductor layer, and the first width is greater than the second width.
1. A method of manufacturing a memory device, comprising:
forming a stack of a plurality of alternating first insulating films and sacrificial films on a conductive layer;
forming a first hole penetrating the plurality of first insulating films and the plurality of sacrificial films and extending to the conductive layer;
forming a semiconductor base on top of the conductive layer inside the first hole, the semiconductor base having an upper end positioned between a first sacrificial film, among the plurality of sacrificial films, nearest to the conductive layer and a second sacrificial film, among the plurality of sacrificial films, second nearest to the conductive layer;
forming a columnar semiconductor layer within the first hole and over the semiconductor base;
forming a plurality of spaces between the plurality of first insulating films by selectively removing the plurality of sacrificial films;
after forming the columnar semiconductor layer and after forming the plurality of spaces, forming an extension of the semiconductor base on a sidewall of the semiconductor base and into one of the plurality of spaces nearest to the conductive layer;
forming a second insulating film by oxidizing at least a portion of the extension on the sidewall of the semiconductor base; and
forming an electrode layer in each of the plurality of spaces.
2. The method according to claim 1 , wherein, after the second insulating film is formed, a portion of the extension on the sidewall of the semiconductor base remains extending inwardly of the space nearest to the conductive layer.
3. The method according to claim 2 , wherein the semiconductor base and the portion of the extension comprise silicon.
4. The method according to claim 2 , wherein the semiconductor base is epitaxially grown on a portion of the conductive layer exposed to the first hole, and the portion of the extension is epitaxially grown on the semiconductor base.
5. The method according to claim 1 , further comprising:
forming a slit through the plurality of alternating first insulating films and sacrificial films on the conductive layer extending to the conductive layer.
6. The method according to claim 5 , further comprising:
forming a semiconductor layer on the conductive layer exposed to the slit while forming the extension on the sidewall of the semiconductor base.