IP Library › Granted Patent US 11,355,470
Granted Patent B2
US 11,355,470 · App. 16/802,614 · Granted Jun 7, 2022

Semiconductor device and methods of manufacturing semiconductor devices

Inventors: Ji Yeon Ryu (Incheon, KR); Jae Beom Shim (Incheon, KR); Tae Yong Lee (Gyeonggi-do, KR); Byong Jin Kim (Seoul, KR)
Assignee: Amkor Technology Singapore Holding Pte. Ltd.
H01L24/40H01L21/4875H01L21/565H01L23/3107H01L23/3135H01L23/367H01L23/4334H01L23/492H01L23/4951H01L2224/40247
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Quick Facts
Patent No.
US 11,355,470
App. No.
16/802,614
Granted
Jun 7, 2022
Kind
B2
Abstract

In one example, a semiconductor device comprises an electronic component comprising a component face side, a component base side, a component lateral side connecting the component face side to the component base side, and a component port adjacent to the component face side, wherein the component port comprises a component port face. A clip structure comprises a first clip pad, a second clip pad, a first clip leg connecting the first clip pad to the second clip pad, and a first clip face. An encapsulant covers portions of the electronic component and the clip structure. The encapsulant comprises an encapsulant face, the first clip pad is coupled to the electronic component, and the component port face and the first clip face are exposed from the encapsulant face. Other examples and related methods are also disclosed herein.

Claims (99)

1. A semiconductor device, comprising:

a semiconductor component comprising:

a component face side;

a component base side;

a component lateral side connecting the component face side to the component base side;

a component port adjacent to the component face side and comprising:

a first component terminal on the component face side; and

a first component interconnect coupled to the first component terminal; and

a second component terminal on the component base side;

a clip structure coupled to the component face side with a first interface material; and

an encapsulant covering portions of the semiconductor component and the clip structure;

wherein:

the first component interconnect comprises a component port face;

the encapsulant comprises a first encapsulant face and a second encapsulant face opposite to the first encapsulant face;

the clip structure comprises a first clip face and a second clip face; and

the component port face and the first clip face are exposed from the first encapsulant face; and

the second clip face is electrically coupled to the second component terminal at the second encapsulant face.

2. The semiconductor device of claim 1 , wherein:

the first interface material is electrically insulating; and

the first encapsulant face, the first clip face, and the component port face are substantially co-planar.

3. The semiconductor device of claim 1 , wherein:

the clip structure comprises:

a first clip pad having the first clip face;

a second clip pad having the second clip face; and

a first clip leg connecting the first clip pad and the second clip pad together.

4. The semiconductor device of claim 1 wherein:

the second clip face is coupled to the second component terminal with a conductive plate that overlaps the second clip face and the second component terminal.

5. The semiconductor device of claim 4 , wherein:

the second clip face and the second component terminal are coupled to the conductive plate with a second interface material;

the second interface material is electrically conductive;

the second interface material is exposed from the second encapsulant face; and

outer surfaces of the second interface material are coplanar with the second encapsulant face.

6. The semiconductor device of claim 1 , wherein:

the clip structure comprises:

a first clip pad coupled to the semiconductor component and having the first clip face;

a second clip pad having the second clip face;

a first clip leg connecting the first clip pad and the second clip pad together;

a third clip pad coupled to the semiconductor component;

a fourth clip pad; and

a second clip leg connecting the third clip pad and the fourth clip pad together.

7. The semiconductor device of claim 6 , wherein:

the first clip pad is coupled to the component face side at a first peripheral edge of the semiconductor component;

the third clip pad is coupled to the component face side at a second peripheral edge of the semiconductor component; and

the encapsulant completely covers outer ends of the second clip face and the fourth clip face.

8. The semiconductor device of claim 1 , further comprising:

a dielectric layer over the first encapsulant face and having apertures, wherein portions of the first clip face and the component port face are exposed within the apertures; and

external interconnects coupled to the first clip face and the component port face through the apertures.

9. The device of claim 1 , wherein:

the second component terminal is a drain terminal.

10. A semiconductor device, comprising:

a semiconductor component comprising:

a component face side;

a component base side;

a component lateral side connecting the component face side to the component base side;

a component port adjacent to the component face side, wherein the comprises a component port face; and

a first component terminal on the component base side;

a clip structure comprising:

a first clip pad having a first clip face;

a second clip pad having a second clip face; and

a first clip leg connecting the first clip pad to the second clip pad;

and

an encapsulant covering portions of the semiconductor component and the clip structure;

wherein:

the encapsulant comprises a first encapsulant face and a second encapsulant face opposite to the first encapsulant face;

the first clip pad is coupled to the component face side with a first interface material;

the first interface material is electrically insulating; and

the component port face and the first clip face are exposed from the first encapsulant face.

11. The semiconductor device of claim 10 , wherein:

the component port comprises a second component terminal and a component interconnect;

the component interconnect comprises the component port face;

the component port face and the first clip face are substantially co-planar; and

the first component terminal is one of a drain terminal or a source terminal.

12. The semiconductor device of claim 10 , wherein:

the second clip face is electrically connected to first component terminal at the second encapsulant face.

13. The semiconductor device of claim 10 , wherein:

the second clip pad has an outer end proximate to a side of the encapsulant; and

the outer end is completely covered by the encapsulant.

14. A method of forming a semiconductor device, comprising:

providing a semiconductor component comprising:

a component face side;

a component base side;

a component lateral side connecting the component face side to the component base side;

a component port adjacent to the component face side and comprising a first component terminal on the component face side; and a first component interconnect coupled to the first component terminal, wherein the first component interconnect comprises a component port face; and

a second component terminal on the component base side;

providing a clip structure having a first clip face and a second clip face;

coupling the clip structure to the component face side with a first interface material;

providing an encapsulant covering portions of the semiconductor component and the clip structure;

wherein:

the first interface material is electrically insulating;

the second clip face has an outer end proximate to a side of the encapsulant;

the encapsulant comprises a first encapsulant face and a second encapsulant face opposite to the first encapsulant face; and

the component port face and the first clip face are exposed from the first encapsulant face; and

electrically coupling the second clip face to the second component terminal at the second encapsulant face.

15. The method of claim 14 , further comprising:

providing a dielectric over the first encapsulant face; and

providing apertures in the dielectric that expose portions of the first clip face and the component port face; and

providing external interconnects coupled to the first clip face and the component port face through the apertures.

16. The method of claim 12 , wherein:

the covering includes completely covering the outer end of the second clip face.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2020
From: RYU, JI YEON; SHIM, JAE BEOM; LEE, TAE YONG; KIM, BYONG JIM
To: AMKOR TECHNOLOGY KOREA, INC.
Reel/Frame 051944/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2020
From: AMKOR TECHNOLOGY KOREA, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTD.
Reel/Frame 052028/0728 →
Continuity (1)
Related Publication 20210272923A1 · Sep 2, 2021