IP Library Granted Patent US 11,455,115
Granted Patent B2
US 11,455,115 · App. 16/804,053 · Granted Sep 27, 2022

Storage device

Inventors: Junpei Futagi (Yokohama, JP); Kentaro Umesawa (Kawasaki, JP)
Assignee: Kioxia Corporation
G06F3/065G06F3/0619G06F3/0659G06F3/0679G06F11/1451G06F11/1469G06F21/572G06F2201/82G06F2221/033
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Quick Facts
Patent No.
US 11,455,115
App. No.
16/804,053
Granted
Sep 27, 2022
Kind
B2
Abstract

According to one embodiment, a storage device includes a nonvolatile memory and a controller. The controller is configured to control data write to the nonvolatile memory and data read from the nonvolatile memory based on a command from a host. The controller includes at least one processor. The nonvolatile memory stores first firmware for normal operation and second firmware for recovery. The first firmware is firmware to cause the at least one processor to control the data write and the data read based on the command. The second firmware is firmware to cause the at least one processor to recover the first firmware. The second firmware is stored in the nonvolatile memory with higher reliability than the first firmware.

Claims (52)

1. A storage device comprising:

a nonvolatile memory; and

a controller configured to control data write to the nonvolatile memory and data read from the nonvolatile memory based on a command from a host,

wherein:

the controller includes at least one processor;

the nonvolatile memory stores first firmware for normal operation and second firmware for recovery, the first firmware being firmware to cause the at least one processor to control the data write and the data read based on the command, the second firmware being firmware to cause the at least one processor to recover the first firmware;

the second firmware is stored in the nonvolatile memory with higher reliability than the first firmware;

the at least one processor includes a first processor and a second processor, the first processor having a function of verifying reliability of the first firmware and the second firmware, the second processor being to execute the first firmware;

the nonvolatile memory includes a first area to be accessed by the first processor but not to be accessed by the second processor;

the second firmware is stored in the first area; and

the first firmware is stored in a second area other than the first area of the nonvolatile memory.

2. The storage device of claim 1 , wherein:

the first firmware and the second firmware are encrypted; and

the second firmware is encrypted using an algorithm whose encryption strength is higher than the first firmware, or the second firmware is encrypted using an encryption key whose key length is greater than the first firmware.

3. The storage device of claim 1 , wherein the second firmware is encrypted.

4. The storage device of claim 1 , wherein the first area stores data to be used by the first processor when the first processor recovers the first firmware by executing the second firmware.

5. The storage device of claim 1 , wherein:

the first firmware and the second firmware are encrypted; and

the second firmware is encrypted using an algorithm whose encryption strength is higher than the first firmware, or the second firmware is encrypted using an encryption key whose key length is greater than the first firmware.

6. The storage device of claim 1 , wherein the second firmware includes a program which causes the first processor to perform a first process and a second process, the first process being a process of acquiring regular first firmware from the host, the second process being a process of overwriting the first firmware stored in the second area of the nonvolatile memory to the regular first firmware acquired from the host.

7. The storage device of claim 1 , wherein the first processor is further configured to:

detect an abnormal operation of the storage device;

determine whether the storage device whose abnormal operation has been detected is to be recovered by recovering the first firmware; and

recover the first firmware by executing the second firmware when it is determined that the storage device is to be recovered.

8. The storage device of claim 1 , wherein the first processor is configured to overwrite the first firmware to be recovered into the second firmware, and to reboot the storage device.

9. The storage device of claim 8 , further comprising a volatile memory,

wherein the first processor is configured to execute the second firmware read in the volatile memory.

10. A storage device comprising:

a first nonvolatile memory;

a second nonvolatile memory which stores data including a program with higher reliability than the first nonvolatile memory; and

a controller configured to control data write to the first nonvolatile memory and data read from the first nonvolatile memory based on a command from a host,

wherein:

the controller includes at least one processor;

the first nonvolatile memory stores first firmware to cause the at least one processor to control the data write and the data read based on the command;

the second nonvolatile memory stores second firmware to recover the first firmware;

the at least one processor includes a first processor and a second processor the first processor having a function of verifying reliability of the first firmware and the second firmware, the second processor being to execute the first firmware; and

the second nonvolatile memory is to be accessed by the first processor but not to be accessed by the second processor.

11. The storage device of claim 10 , wherein the second nonvolatile memory has a capacity that is smaller than a capacity necessary to store the first firmware.

12. The storage device of claim 11 , wherein the capacity of the second nonvolatile memory is 500 Kbytes or less.

13. The storage device of claim 10 , wherein the second nonvolatile memory comprises a read-only memory.

14. The storage device of claim 13 , further comprising a fuse element configured to store data by electrically changing characteristics of element irreversibly,

wherein the fuse element stores verification data to verify the second firmware stored in the second nonvolatile memory.

15. The storage device of claim 10 , wherein the second firmware includes a program which causes the first processor to perform a first process and a second process, the first process being a process of acquiring regular first firmware from the host, the second process being a process of overwriting the first firmware stored in the first nonvolatile memory to the regular first firmware acquired from the host.

16. The storage device of claim 10 , wherein the first processor includes a built-in memory which stores verification data to verify the first firmware, and is configured to determine whether the first firmware is tampered with by verification using the verification data stored in the built-in memory.

17. The storage device of claim 10 , wherein the second nonvolatile memory stores data to be used by the first processor when the first processor recovers the first firmware by executing the second firmware.

18. The storage device of claim 10 , wherein the first processor is further configured to:

detect an abnormal operation of the storage device;

determine whether the storage device whose abnormal operation has been detected is to be recovered by recovering the first firmware; and

recover the first firmware by executing the second firmware when it is determined that the storage device is to be recovered.

19. The storage device of claim 18 , wherein the first processor is configured to overwrite the first firmware to be recovered into the second firmware, and to reboot the storage device.

20. The storage device of claim 18 , further comprising a volatile memory,

wherein the first processor is configured to execute the second firmware read in the volatile memory.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2020
From: FUTAGI, JUNPEI; UMESAWA, KENTARO
To: KIOXIA CORPORATION
Reel/Frame 051958/0154 →
Priority Claims (1)
JP JP2019-147505 · Aug 9, 2019 · national
Continuity (1)
Related Publication 20210042035A1 · Feb 11, 2021