Adaptive frequency adjusting system

1. An adaptive frequency adjusting system for a power converter having a high duty ratio, wherein the power converter includes a control circuit, a driver circuit, an upper bridge switch, a lower bridge switch, an error amplifier, and a first comparator, the driver circuit is connected to the control circuit, the upper bridge switch and the lower bridge switch, one terminal of an inductor is connected between the upper bridge switch and the lower bridge switch, another terminal of the inductor is grounded through a capacitor, the error amplifier is connected to a node between the capacitor and the inductor, the error amplifier multiplies a difference between a voltage of the capacitor and a reference voltage by a gain to output an error amplified signal, the first comparator is connected to the error amplifier to compare the error amplified signal with a slope signal to output a comparing signal, and the adaptive frequency adjusting system comprises:

a clock generator connected to the control circuit, and configured to output a clock signal having a preset frequency to the control circuit and reduce a frequency of the clock signal according to a frequency reducing signal, wherein the control circuit controls the upper bridge switch or the lower bridge switch according to the frequency of the clock signal; and

a second capacitor connected to the clock generator, the first comparator and the control circuit;

wherein when the second capacitor determines that a voltage of the slope signal reaches a voltage of the error amplified signal within a maximum on-time of the upper bridge switch according to the comparing signal, the second capacitor outputs a reset signal to the control circuit;

wherein when the second capacitor determines that the voltage of the slope signal fails to reach the voltage of the error amplified signal and the maximum on-time of the upper bridge switch ends according to the comparing signal, the second capacitor determines that a duty ratio of an input voltage of the upper bridge switch to a voltage of the node reaches a maximum duty ratio of the frequency of the clock signal, and the second capacitor outputs the reset signal to the control circuit and the frequency reducing signal to the clock generator at an end point of the maximum on-time;

wherein the reset signal instructs the control circuit to control the driver circuit to turn off the upper bridge switch and turn on the lower bridge switch.

2. The adaptive frequency adjusting system according to claim 1 , wherein the power converter further includes a voltage divider circuit connected between the error amplifier and the capacitor, the voltage divider divides the voltage of the capacitor to generate a feedback voltage, and the error amplifier multiplies a difference between the feedback voltage and the reference voltage by a gain to output the error amplified signal.

3. The adaptive frequency adjusting system according to claim 1 , wherein the control circuit outputs a pulse width modulation signal according to the clock signal to control the upper bridge switch or the lower bridge switch.

4. An adaptive frequency adjusting system for a power converter having a high duty ratio, wherein the power converter includes a control circuit, a driver circuit, an upper bridge switch, a lower bridge switch, an error amplifier, and a first comparator, the driver circuit is connected to the control circuit, the upper bridge switch and the lower bridge switch, one terminal of an inductor is connected between the upper bridge switch and the lower bridge switch, another terminal of the inductor is grounded through a capacitor, the error amplifier is connected to a node between the capacitor and the inductor, the error amplifier multiplies a difference between a voltage of the capacitor and a reference voltage by a gain to output an error amplified signal, the first comparator is connected to the error amplifier to compare the error amplified signal with a slope signal to output a comparing signal, and the adaptive frequency adjusting system comprises:

an on-time generator circuit connected to the first comparator and configured to determine an on-time of the upper bridge switch to output an upper bridge conducting signal according to the comparing signal;

a falling edge detector circuit connected to the on-time generator circuit and the control circuit, and configured to output a reset signal at a time point of a falling edge of the upper bridge conducting signal for instructing the control circuit to control the driver circuit to turn off the upper bridge switch and turn on the lower bridge switch; and

a second comparator connected to the first comparator, the falling edge detector circuit and the on-time generator circuit, and wherein when the second capacitor determines that the voltage of the error amplified signal reaches the voltage of the slope signal within a minimum off-time starting from a falling edge of the upper-bridge conducting signal according to the comparing signal, the second capacitor determines that a duty ratio of an input voltage received by the upper bridge switch to the voltage of the capacitor reaches a maximum duty ratio, and outputs an on-time extending signal for instructing the on-time generator circuit to extend the on-time.

5. The adaptive frequency adjusting system according to claim 4 , further comprising:

an off-time detector circuit connected to the falling edge detector circuit and the second comparator, and configured to detect the minimum off-time of the upper-bridge conducting signal and provide the minimum off-time to the second comparator.

6. The adaptive frequency adjusting system according to claim 4 , wherein the power converter further includes a voltage divider circuit connected between the error amplifier and the capacitor, the voltage divider divides the voltage of the capacitor to generate a feedback voltage, and the error amplifier multiplies a difference between the feedback voltage and the reference voltage by a gain to output the error amplified signal.