Universal driver systems and methods of operating the same

1. A system, comprising:

a controller that is configured to generate a plurality of switch control signals;

a plurality of electrical circuit elements, the plurality of electrical circuit elements being characterized by a plurality of impedances, respectively;

a plurality of voltage sources; and

a plurality of switches that are programmable to couple the plurality of electrical circuit elements to the plurality of voltage sources responsive to the plurality of switch control signals;

wherein a first subset of the plurality of circuit elements is coupled to a first output node and a second subset of the plurality of circuit elements is coupled to a second output node;

wherein the first output node and the second output node are configured to couple to a device under test; and

wherein the first output node is configured to couple to a gate terminal of the device under test and the second output node is configured to couple to a source terminal of a device under test.

2. The system of claim 1 ,

wherein a first subset of the plurality of switches are programmable to couple the first subset of the plurality of circuit elements to a first subset of the plurality of voltage sources responsive to a first subset of the plurality of switch control signals; and

wherein a second subset of the plurality of switches are programmable to couple the second subset of the plurality of circuit elements to a second subset of the plurality of voltage sources responsive to a second subset of the plurality of switch control signals.

3. The system of claim 1 , further comprising:

a plurality of bypass switches coupled in parallel with the plurality of electrical circuit elements, respectively, each of the plurality of bypass switches being programmable in first and second states responsive to a bypass subset of the plurality of switch control signals;

wherein respective ones of the plurality of electrical circuit elements are electrically removed when respective ones of the plurality of bypass switches are in the first state.

4. The system of claim 1 , wherein the plurality of switches comprises element configuration switches that are programmable to couple ones of the plurality of electrical circuit elements to each other in series and in parallel responsive to an element configuration subset of the plurality of switch control signals.

5. The system of claim 1 , wherein each of the plurality of impedances comprises a resistance, a capacitance, an inductance, a combination of resistance and capacitance, a combination of capacitance and inductance, or a combination of resistance, capacitance, and inductance.

6. The system of claim 1 , wherein the plurality of switches are programmable to couple one of the plurality of electrical circuit elements to one of the plurality of voltage sources in a voltage source driver configuration responsive to the plurality of switch control signals being in a voltage source configuration state.

7. The system of claim 6 , wherein the one of the plurality of circuit elements comprises a circuit including a resistor, a capacitor, an inductor, a combination of the resistor and the capacitor, a combination of the resistor and the inductor, a combination of the capacitor and the inductor, or a combination of the resistor, the capacitor, and the inductor; and

wherein the one of the plurality of circuit elements is coupled to the one of the plurality of voltage sources.

8. The system of claim 6 , wherein a combination of the plurality of circuit elements comprises a resistor and a capacitor, the resistor and an inductor, the capacitor and the inductor, or the resistor, the inductor, and the capacitor; and

wherein the combination of the plurality of circuit elements is coupled to one of the plurality of voltage sources.

9. The system of claim 1 , wherein the plurality of switches are programmable to selectively couple one of the plurality of electrical circuit elements to the plurality of voltage sources and to an output node in a multi-state current source driver configuration responsive to the plurality of switch control signals transitioning between a plurality of current source configuration states.

10. The system of claim 9 , wherein the one of plurality of circuit elements comprises an inductor; and

wherein the inductor is coupled to one of the plurality of voltages sources and is configured to establish a current therethrough during a first portion of the plurality of current source configuration states; and

wherein the inductor is coupled to an output node and is configured to discharge the current through the output node during a second portion of the plurality of current source configuration states.

11. The system of claim 10 , wherein the inductor is decoupled from the one of the plurality of voltage sources during a third portion of the plurality of current source configuration states.

12. The system of claim 11 , wherein the third portion of the plurality of current source configuration states corresponds to a voltage at the output node being approximately equal to a voltage of the one of the plurality of voltage sources.

13. A method, comprising:

generating a plurality of switch control signals; and

programming a plurality of switches to couple a plurality of electrical circuit elements to a plurality of voltage sources responsive to the plurality of switch control signals, the plurality of electrical circuit elements being characterized by a plurality of impedances, respectively;

wherein a first subset of the plurality of circuit elements is coupled to a first output node and a second subset of the plurality of circuit elements is coupled to a second output node;

wherein the first output node and the second output node are configured to couple to a device under test; and

wherein the first output node is configured to couple to a gate terminal of the device under test and the second output node is configured to couple to a source terminal of a device under test.

14. The method of claim 13 , further comprising:

programming a first subset of the plurality of switches to couple the first subset of the plurality of circuit elements to a first subset of the plurality of voltage sources responsive to a first subset of the plurality of switch control signals; and

programming a second subset of the plurality of switches to couple the second subset of the plurality of circuit elements to a second subset of the plurality of voltage sources responsive to a second subset of the plurality of switch control signals.

15. The method of claim 13 , further comprising:

coupling a plurality of bypass switches in parallel with the plurality of electrical circuit elements, respectively, each of the plurality of bypass switches being programmable in first and second states responsive to a bypass subset of the plurality of switch control signals;

wherein respective ones of the plurality of electrical circuit elements are electrically removed when respective ones of the plurality of bypass switches are in the first state.

16. The method of claim 13 , wherein the plurality of switches comprises element configuration switches, the method further comprising:

programming the element configuration switches to couple ones of the plurality of electrical circuit elements to each other in series and in parallel responsive to an element configuration subset of the plurality of switch control signals;

wherein each of the plurality of impedances comprises a resistance, a capacitance, an inductance, a combination of resistance and capacitance, a combination of capacitance and inductance, or a combination of resistance, capacitance, and inductance.

17. A computer program product, comprising:

a non-transitory computer readable storage medium comprising computer readable program code embodied in the medium that is executable by a processor to perform operations comprising:

generating a plurality of switch control signals; and

programming a plurality of switches to couple a plurality of electrical circuit elements to a plurality of voltage sources responsive to the plurality of switch control signals, the plurality of electrical circuit elements being characterized by a plurality of impedances, respectively;

wherein a first subset of the plurality of circuit elements is coupled to a first output node and a second subset of the plurality of circuit elements is coupled to a second output node;

wherein the first output node and the second output node are configured to couple to a device under test; and

wherein the first output node is configured to couple to a gate terminal of the device under test and the second output node is configured to couple to a source terminal of a device under test.

18. The computer program product of claim 17 , wherein the operations further comprise:

programming a first subset of the plurality of switches to couple the first subset of the plurality of circuit elements to a first subset of the plurality of voltage sources responsive to a first subset of the plurality of switch control signals; and

programming a second subset of the plurality of switches to couple the second subset of the plurality of circuit elements to a second subset of the plurality of voltage sources responsive to a second subset of the plurality of switch control signals.

19. The computer program product of claim 17 , wherein the operations further comprise:

coupling a plurality of bypass switches in parallel with the plurality of electrical circuit elements, respectively, each of the plurality of bypass switches being programmable in first and second states responsive to a bypass subset of the plurality of switch control signals;

wherein respective ones of the plurality of electrical circuit elements are electrically removed when respective ones of the plurality of bypass switches are in the first state.

20. The computer program product of claim 17 , wherein the plurality of switches comprises element configuration switches, the operations further comprising:

programming the element configuration switches to couple ones of the plurality of electrical circuit elements to each other in series and in parallel responsive to an element configuration subset of the plurality of switch control signals;

wherein each of the plurality of impedances comprises a resistance, a capacitance, an inductance, a combination of resistance and capacitance, a combination of capacitance and inductance, or a combination of resistance, capacitance, and inductance.