Memristive multi-terminal spiking neuron

1. A memristive multi-terminal spiking neuron apparatus, comprising:

a non-volatile memristor;

wherein the non-volatile memristor has a resistance ratio between the high-resistance and low-resistance states exceeding 4 decades of magnitude;

wherein the non-volatile memristor retains its low-resistance and high-resistance states within a decade of the set value for a time period exceeding 1 second;

a volatile memristor;

wherein the volatile memristor retains its low-resistance state for a time period of less than 10 nanoseconds; and

a capacitor;

wherein the volatile memristor is in parallel with the capacitor,

a first conductor wherein the first conductor comprises multiple branches and wherein some of the multiple branches overlap with a second, third, and subsequent conductors in series respectively, via non-volatile and volatile memristor film stacks comprising a non-volatile, memristor, a volatile memristor, and a capacitor; and

wherein some of the multiple branches overlap with a fourth conductor with an interposing dielectric film or films comprising a capacitor, a non-volatile memristor, and a volatile memristor in separate areas or branches of the overlapping area.

2. A method of making a programmable electrical spiking output from a memristive multi-terminal spiking neuron, comprising:

providing one or more neuron devices wherein each neuron device comprises a non-volatile memristor;

wherein the non-volatile memristor has a resistance ratio between the high-resistance and low-resistance states exceeding 4 decades of magnitude;

wherein the non-volatile memristor retains its low-resistance and high-resistance states within a decade of the set value for a time period exceeding 1 second;

a volatile memristor;

wherein the volatile memristor retains its low-resistance state for a time period of less than 10 nanoseconds; and

a capacitor;

wherein the volatile memristor is in parallel with the capacitor;

a first conductor wherein the first conductor comprises multiple branches and wherein some of the multiple branches overlap with a second, third, and subsequent conductors in series respectively, via non-volatile and volatile memristor film stacks comprising a non-volatile, memristor, a volatile memristor, and a capacitor; and

wherein some of the multiple branches overlap with a fourth conductor with an interposing dielectric film or films comprising a capacitor, a non-volatile memristor, and a volatile memristor in separate areas or branches of the overlapping area providing a first input spiking signal to the first one of the neuron devices from a second neuron device;

providing a second input spiking signal from a third one of the devices to the first neuron device;

providing a third input spiking signal from a fourth one of the devices to the first neuron device;

providing a (n-1)th input spiking signal from an n-th one of the devices to the first neuron device; and

creating a programmable spiking output signal from the first neuron device;

wherein the programmable spiking output signal from the neuron device changes in response to the first, second, and third and n-th input spiking signals received.

3. The method of making a programmable electrical spiking output from a memristive multi-terminal spiking neuron of claim 2 , further comprising wherein the input spiking signal from one of the other neuron devices to the first neuron device is an electrical input spiking signal.

4. The method of making a programmable electrical spiking output from a memristive multi-terminal spiking neuron of claim 3 , further comprising wherein the programmable spiking output signal from the neuron device is an electrical spiking output signal.