IP Library Granted Patent US 11,139,890
Granted Patent B2
US 11,139,890 · App. 16/828,371 · Granted Oct 5, 2021

Systems and methods for delta-sigma digitization

Inventors: Jing Wang (Broomfield, CO); Luis Alberto Campos (Superior, CO); Zhensheng Jia (Superior, CO)
Assignee: Cable Television Laboratories, Inc.
H04B10/2575H03M3/424H03M3/43H03M3/454H03M3/496H04B1/0007H04B1/0042H04B10/25753
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Quick Facts
Patent No.
US 11,139,890
App. No.
16/828,371
Granted
Oct 5, 2021
Kind
B2
Abstract

A baseband processing unit includes a baseband processor configured to receive a plurality of component carriers of a radio access technology wireless service, and a delta-sigma digitization interface configured to digitize at least one carrier signal of the plurality of component carriers into a digitized bit stream, for transport over a transport medium, by (i) oversampling the at least one carrier signal, (ii) quantizing the oversampled carrier signal into the digitized bit stream using two or fewer quantization bits.

Claims (34)

1. A baseband processing unit (BBU), comprising:

a baseband processor configured to receive a plurality of component carriers of a radio access technology wireless service; and

a delta-sigma digitization interface configured to digitize at least one carrier signal of the plurality of component carriers into a digitized bit stream, for transport over a transport medium, by (i) oversampling the at least one carrier signal, (ii) quantizing the oversampled carrier signal into the digitized bit stream using two or fewer quantization bits.

2. The BBU of claim 1 , wherein the delta-sigma digitization interface comprises a delta-sigma analog-to-digital converter (ADC).

3. The BBU of claim 2 , wherein the delta-sigma ADC comprises a one-bit quantizer.

4. The BBU of claim 3 , wherein the delta-sigma ADC further comprises a second-order impulse filter including at least two feedback loops.

5. The BBU of claim 3 , wherein the plurality of component carriers comprises 32 long term evolution carriers.

6. The BBU of claim 2 , wherein the delta-sigma ADC comprises a two-bit quantizer.

7. The BBU of claim 6 , wherein the delta-sigma ADC further comprises a second-order impulse filter including at least two feedback loops.

8. The BBU of claim 6 , wherein the delta-sigma ADC further comprises a fourth-order impulse filter including at least four feedback loops.

9. The BBU of claim 8 , wherein the fourth-order impulse filter includes a plurality of feedforward coefficients and a plurality of feedback coefficients.

10. The BBU of claim 9 , wherein the plurality of feedforward coefficients and the plurality of feedback coefficients are tunable.

11. The BBU of claim 6 , wherein the plurality of component carriers comprises 32 long term evolution carriers.

12. The BBU of claim 6 , wherein the plurality of component carriers comprises 37 long term evolution carriers.

13. The BBU of claim 6 , wherein a first portion of the plurality of component carriers has a different modulation format than a second portion of the plurality of component carriers.

14. The BBU of claim 2 , wherein an input of the delta-sigma ADC includes at least one recursion loop from an output of the delta-sigma ADC.

15. A method for performing delta-sigma analog-to-digital conversion (ADC) of a plurality of component carriers, the method comprising the steps of:

obtaining a data rate of a selected communication specification;

selecting a quantity of the plurality of component carriers and corresponding modulation formats according to the obtained data rate;

determining a signal-to-noise ratio for the selected quantity of component carriers based on error vector magnitude values compatible with the selected communication specification;

calculating a number of quantization bits and a noise transfer function according to the number of quantization bits;

quantizing the plurality of component carriers into a digitized bit stream according to the number of quantization bits and the noise transfer function; and

wherein the number of quantization bits is 1, and wherein a frequency distribution of the noise transfer function includes one null point.

16. The method of claim 15 , wherein the number of quantization bits is 1, and wherein a frequency distribution of the noise transfer function includes one null point.

17. The method of claim 16 , wherein the one null point represents a frequency value of zero.

18. The method of claim 16 , wherein the step of quantizing comprises on-off keying.

19. A method for performing delta-sigma analog-to-digital conversion (ADC) of a plurality of component carriers, the method comprising the steps of:

obtaining a data rate of a selected communication specification;

selecting a quantity of the plurality of component carriers and corresponding modulation formats according to the obtained data rate;

determining a signal-to-noise ratio for the selected quantity of component carriers based on error vector magnitude values compatible with the selected communication specification;

calculating a number of quantization bits and a noise transfer function according to the number of quantization bits;

quantizing the plurality of component carriers into a digitized bit stream according to the number of quantization bits and the noise transfer function; and

wherein the number of quantization bits is 2, and wherein a frequency distribution of the noise transfer function includes two null points.

20. The method of claim 19 , wherein the step of quantizing comprises four-level pulse amplitude modulation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2020
From: WANG, JING; CAMPOS, LUIS ALBERTO; JIA, ZHENSHENG
To: CABLE TELEVISION LABORATORIES, INC.
Reel/Frame 052748/0742 →
Continuity (5)
Continuation 16283520 · Feb 22, 2019
Continuation In Part 16191315 · Nov 14, 2018
Provisional Application 62586041 · Nov 14, 2017
Provisional Application 62633956 · Feb 22, 2018
Related Publication 20200228206A1 · Jul 16, 2020