Targeted repair of hardware components in a computing device

1. A method for targeted repair of a hardware component in a computing device that is part of a cloud computing system, comprising:

monitoring a plurality of hardware components in the computing device;

querying an error information repository during a boot process of the computing device, the error information repository being maintained in non-volatile storage, the error information repository comprising error information identifying a defective sub-component within the hardware component of the computing device, the hardware component also comprising at least one sub-component that is functioning properly and a spare component that can be used in place of the defective sub-component;

obtaining the error information identifying the defective sub-component in response to the querying; and

performing a targeted repair action during the boot process of the computing device, wherein the targeted repair action prevents the defective sub-component from being used by the computing device and allows the at least one sub-component that is functioning properly to be used by the computing device, and wherein the targeted repair action causes the spare component to be used in place of the defective sub-component, wherein

the hardware component comprises a multi-core processor;

the defective sub-component comprises a defective processor core;

the multi-core processor further comprises at least one processor core that is functioning properly and a spare processor core that can be used in place of the defective processor core; and

performing the targeted repair action causes the spare processor core to be used in place of the defective processor core, wherein the targeted repair action prevents the defective processor core from being used by the computing device without preventing the at least one processor core that is functioning properly from being used by the computing device.

2. The method of claim 1 , wherein identifying the defective sub-component comprises:

detecting an error signal indicating that the hardware component includes the defective sub-component; and

obtaining error information that identifies the defective sub-component.

3. The method of claim 1 , wherein:

the hardware component comprises a memory device that is configured with post package repair (PPR) capability;

the defective sub-component comprises a defective memory region;

the memory device comprises a spare memory region that can be used in place of the defective memory region; and

performing the targeted repair action comprises performing a PPR operation that causes the spare memory region to be used in place of the defective memory region.

4. A system for targeted repair of a hardware component in a computing device, comprising:

at least one processor;

memory communicatively coupled to the at least one processor; and

instructions stored in the memory, the instructions being executable by the at least one processor to:

perform predictive failure analysis on hardware components of the computing device;

identify a defective sub-component based at least in part on the predictive failure analysis;

record error information identifying the defective sub-component in an error information repository;

query the error information repository during a boot process of the computing device, the error information repository being maintained in non-volatile storage, the error information repository comprising the error information identifying the defective sub-component within the hardware component, the hardware component also comprising at least one sub-component that is not defective;

obtain the error information identifying the defective sub-component in response to the querying; and

perform a targeted repair action on the defective sub-component during the boot process of the computing device, wherein the targeted repair action alters the hardware component to prevent the defective sub-component from being used by the computing device and allows the at least one sub-component that is not defective to be used by the computing device.

5. The system of claim 4 , wherein the instructions are further executable by the at least one processor to:

detect an error signal corresponding to the defective sub-component; and

record the error information identifying the defective sub-component in the error information repository.

6. The system of claim 4 , wherein:

the hardware component additionally comprises a spare sub-component that can be used in place of the defective sub-component; and

the targeted repair action causes the spare sub-component to be used in place of the defective sub-component.

7. The system of claim 4 , wherein:

the hardware component comprises a memory device that is configured with post package repair (PPR) capability;

the defective sub-component comprises a defective memory region;

the memory device comprises a spare memory region that can be used in place of the defective memory region; and

performing the targeted repair action comprises performing a PPR operation that causes the spare memory region to be used in place of the defective memory region.

8. The system of claim 7 , wherein the instructions are further executable by the at least one processor to test portions of the memory device corresponding to the error information in the error information repository, the testing being performed prior to the targeted repair action.

9. The system of claim 7 , wherein:

a predetermined event comprises a boot process of the computing device; and

the targeted repair action is performed during the boot process, before a memory map is finalized for a current boot cycle.

10. The system of claim 4 , wherein:

the hardware component comprises a multi-core processor;

the defective sub-component comprises a defective processor core;

the multi-core processor further comprises at least one processor core that is functioning properly and a spare processor core that can be used in place of the defective processor core; and

performing the targeted repair action causes the spare processor core to be used in place of the defective processor core, wherein the targeted repair action prevents the defective processor core from being used by the computing device without preventing the at least one processor core that is functioning properly from being used by the computing device.

11. The system of claim 4 , wherein the instructions are further executable by the at least one processor to publish repair telemetry corresponding to the targeted repair action.

12. A method for live targeted repair of a memory device in a computing device, comprising:

detecting an error signal indicating that the memory device includes a defective memory region, the memory device also comprising at least one functioning memory region that is not defective and a spare memory region that can be used in place of the defective memory region, the memory device being configured with post package repair (PPR) capability, the error signal being detected while the computing device is operating;

obtaining error information that identifies the defective memory region; and

initiating a PPR operation on the defective memory region while the computing device is operating and is not performing a boot process, the PPR operation causing the spare memory region to be used in place of the defective memory region, wherein:

the memory device comprises a multi-core processor;

the defective memory region comprises a defective processor core;

the multi-core processor further comprises at least one processor core that is functioning properly and a spare processor core that can be used in place of the defective processor core; and

performing the targeted PPR operation causes the spare processor core to be used in place of the defective processor core, wherein the targeted PPR operation prevents the defective processor core from being used by the computing device without preventing the at least one processor core that is functioning properly from being used by the computing device.

13. The method of claim 12 , wherein:

the memory device additionally comprises a spare memory region that can be used in place of the defective memory region; and

the targeted PPR operation causes the spare memory region to be used in place of the defective memory region.