Selective deposition of barrier layer

1. A method comprising:

providing a workpiece including a semiconductor substrate, a first ILD layer over the semiconductor substrate, and a first metal feature in the first ILD layer;

depositing a second metal feature over the workpiece such that the second metal feature is electrically coupled to the first metal feature;

patterning the second metal feature to form a first trench adjacent to the first metal feature;

depositing a blocking layer over the workpiece, wherein the blocking layer selectively attaches to the first ILD layer;

depositing a barrier layer over the workpiece, wherein the barrier layer selectively forms over the second metal feature relative to the first ILD layer; and

depositing a second ILD layer over the workpiece.

2. The method of claim 1 , further comprising removing the blocking layer before the depositing of the second ILD layer.

3. The method of claim 1 , further comprising:

depositing a glue layer over the first ILD layer; and

patterning the glue layer, wherein the blocking layer selectively attaches to the first ILD layer relative to the glue layer.

4. The method of claim 1 , wherein the blocking layer selectively attaches to the first ILD layer relative to the second metal feature.

5. The method of claim 1 , wherein the blocking layer is deposited using CVD, ALD, spin-on coating, a dipping process, or radical reaction via plasma treatment.

6. The method of claim 1 , wherein the attaching of the blocking layer to the first ILD layer makes a surface of the first ILD layer hydrophobic.

7. The method of claim 1 ,

wherein the blocking layer includes a blocking agent and the blocking agent includes a head group and a tail;

wherein the head group includes a silicon-containing group or a carbon-containing group; and

wherein the tail includes a straight chain hydrocarbon or a cyclic hydrocarbon.

8. The method of claim 1 , wherein the first ILD layer includes silicon oxide;

wherein the blocking layer includes a blocking agent having a silicon-bonding head group; and

wherein the silicon-bonding head group attaches to the first ILD layer.

9. The method of claim 1 , wherein the blocking layer is deposited using a vaporization temperature of about 100-200° C.

10. The method of claim 1 , wherein the blocking layer has a thickness of about 2-50 Å.

11. A method comprising:

providing a workpiece including a semiconductor substrate, a first ILD layer over the semiconductor substrate, a first metal feature in the first ILD layer, and a second metal feature over the first ILD layer such that the second metal feature is electrically coupled to the first metal feature;

patterning the second metal feature to form a first trench adjacent to the first metal feature;

treating the workpiece with a blocking agent having a head group attachable to the first ILD layer;

depositing a barrier layer over the workpiece, wherein the blocking agent prevents the barrier layer from being deposited over the first ILD layer;

removing the blocking agent to expose the first ILD layer; and

depositing a second ILD layer over the workpiece.

12. The method of claim 11 , further comprising depositing a glue layer over the first ILD layer.

13. The method of claim 12 , wherein the blocking agent selectively attaches to the first ILD layer relative to the second metal feature and the glue layer.

14. The method of claim 11 ,

wherein the blocking agent further includes a tail attached to the head group;

wherein the head group includes a silicon-containing group or a carbon-containing group; and

wherein the tail includes a straight chain hydrocarbon or a cyclic hydrocarbon.

15. The method of claim 11 ,

wherein the first ILD layer includes silicon oxide; and

wherein the head group attaches to the first ILD layer.

16. The method of claim 11 , further comprising:

performing a CMP process on the workpiece;

depositing an etch stop layer and a third ILD layer over the workpiece;

patterning the etch stop layer and the third ILD layer to form a second trench adjacent to the second metal feature; and

depositing a third metal feature over the workpiece such that the third metal feature is electrically coupled to the second metal feature.

17. A method comprising:

providing a workpiece including a semiconductor substrate, a first ILD layer over the semiconductor substrate, and a first metal feature in the first ILD layer;

depositing a second metal feature over the workpiece such that the second metal feature is electrically coupled to the first metal feature;

patterning the second metal feature to form a first trench adjacent to the first metal feature;

treating the workpiece with a blocking agent having a head group attachable to the first ILD layer, thereby selectively forming a blocking layer to the first ILD layer;

depositing a barrier layer over the workpiece, wherein the barrier layer selectively forms over the second metal feature relative to the first ILD layer; and

depositing a second ILD layer over the workpiece.

18. The method of claim 17 , further comprising performing a pre-treatment with a reducing agent having at least one of NH 3 and H 2 before treating the workpiece with a blocking agent, wherein

the blocking agent further includes a tail,

the head group includes one of a silicon-containing group and a carbon-containing group, and

the tail includes a bulky steric hindrance group selected from the group consisting of a straight chain hydrocarbon and a cyclic hydrocarbon.

19. The method of claim 17 , further comprising a capping feature selectively disposed on the first metal feature, wherein

the first metal feature includes a first metal,

the capping layer includes a second metal different than the first metal,

the barrier layer includes a first portion and a second portion on opposite sides of the first metal feature, and

the capping feature spans between a first edge of the first portion of the barrier layer and a second edge of the second portion of the barrier layer.

20. The method of claim 19 , wherein the capping layer includes a top surface being coplanar with a top surface of the first ILD layer.