IP Library › Granted Patent US 11,189,651
Granted Patent B2
US 11,189,651 · App. 16/840,663 · Granted Nov 30, 2021

Image sensor

Inventors: Kang Sun Lee (Hwaseong-si, KR); Seung Ho Shin (Asan-si, KR); Hyung Jin Bae (Suwon-si, KR); Jin Ho Seo (Seoul, KR); Ji Hun Shin (Seongnam-si, KR); Moo Sup Lim (Yongin-si, KR); Young Tae Jang (Pyeongtaek-si, KR); Young Kyun Jeong (Hwaseong-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L27/14616H01L27/1463H01L27/14603H01L27/14634H01L27/14641H01L27/14643H04N5/353H04N5/3559H04N5/35563H04N5/37457H01L27/14656H01L31/0203
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Quick Facts
Patent No.
US 11,189,651
App. No.
16/840,663
Granted
Nov 30, 2021
Kind
B2
Abstract

An image sensor including: a first photodiode; a first circuit including an overflow transistor and a first transfer transistor connected to the first photodiode, a switch element connected to the first transfer transistor and a capacitor disposed between the first transfer transistor and the switch element, wherein the capacitor is a physical capacitor; a second photodiode; and a second circuit including a second transfer transistor connected to the second photodiode, a reset transistor connected to an output of the first circuit and a driving transistor connected to the second transfer transistor and the output of the first circuit.

Claims (53)

1. An image sensor comprising:

a first pixel including a first photodiode, a first floating diffusion node, a first reset transistor connected to the first floating diffusion node, a second photodiode, a second floating diffusion node, a second reset transistor connected to the second floating diffusion node;

a driving transistor connected to the first floating diffusion node;

a selection transistor connected to the driving transistor,

a second pixel including a third photodiode and a fourth photodiode,

wherein the second reset transistor is connected to a pixel voltage,

wherein the second reset transistor, the second floating diffusion node, the first reset transistor, and the first floating diffusion node are sequentially arranged,

wherein the image sensor further comprises a controller configured to turn the driving transistor on and off to sense the first photodiode a plurality of times,

wherein a light receiving area of the first photodiode is larger than a light receiving area of the second photodiode,

wherein a light receiving area of the third photodiode is larger than a light receiving area of the fourth photodiode,

wherein the first pixel is disposed directly adjacent to the second pixel, and

wherein the second photodiode is disposed directly adjacent to the fourth photodiode.

2. The image sensor of claim 1 , wherein the first photodiode is first sensed for a first period of time when the driving transistor is off and the first photodiode is second sensed for a second period of time when the driving transistor is off, wherein the first period of time is longer than the second period of time.

3. The image sensor of claim 2 , wherein the second photodiode is sensed for a third period of time and the third period of time is shorter than the first period of time.

4. The image sensor of claim 3 , wherein the second transfer transistor is on and off for a plurality of times and the second reset transistor is off when the second photodiode is sensed for a plurality of third period of times.

5. The image sensor of claim 3 , wherein the first photodiode is sensed for a plurality of second period of times when the driving transistor is off.

6. The image sensor of claim 3 , wherein the first period of time overlaps a period of time in which the first photodiode is sensed and read, and the second period of time does not overlap the period of time in which the first photodiode is sensed and read.

7. The image sensor of claim 6 , wherein the second pixel circuit further comprises an overflow transistor connected to the second photodiode and the overflow transistor is on and off for a plurality of times during the first period of time.

8. An image sensor comprising:

a first pixel including a first photodiode, a first floating diffusion node, a first reset transistor connected to the first floating diffusion node, a second photodiode, a second floating diffusion node, a second reset transistor connected to the second floating diffusion node;

a driving transistor connected to the first floating diffusion node;

a selection transistor connected to the driving transistor, a second pixel including a third photodiode and a fourth photodiode,

wherein the second reset transistor is connected to a pixel voltage,

wherein the second reset transistor, the second floating diffusion node, the first reset transistor, and the first floating diffusion node are sequentially arranged,

wherein the image sensor further comprises a controller configured to turn the driving transistor on and off to sense the first photodiode a plurality of times,

wherein a light receiving area of the first photodiode is larger than a light receiving area of the second photodiode,

wherein a light receiving area of the third photodiode is larger than a light receiving area of the fourth photodiode,

wherein the first pixel is disposed directly adjacent to the second pixel,

wherein the second photodiode is disposed directly adjacent to the third photodiode, and

wherein the first photodiode is first sensed for a first period of time when the driving transistor is off and the first photodiode is second sensed for a second period of time when the driving transistor is off, wherein the first period of time is longer than the second period of time.

9. An image sensor comprising;

a first pixel including a first photodiode, a first transfer transistor, a first floating diffusion node, a first reset transistor directly connected to the first floating diffusion node, a second photodiode, a second floating diffusion node, a second transfer transistor, a second reset transistor connected to the second floating diffusion node;

a driving transistor connected to the first floating diffusion node;

a selection transistor connected to the driving transistor,

wherein the first reset transistor is connected to a pixel voltage,

wherein the second transfer transistor, the second floating diffusion node, and the second reset transistor are sequentially arranged,

wherein the image sensor further comprises a controller configured to turn the driving transistor on and off to sense the first photodiode a plurality of times,

wherein a light receiving area of the first photodiode is larger than a light receiving area of the second photodiode.

10. The image sensor of claim 9 , wherein the first photodiode is first sensed for a first period of time when the driving transistor is off and the first photodiode is second sensed for a second period of time when the driving transistor is off, wherein the first period of time is longer than the second period of time.

11. The image sensor of claim 10 , wherein the second photodiode is sensed for a third period of time and the third period of time is shorter than the first period of time.

12. The image sensor of claim 11 , wherein the second transfer transistor is on and off for a plurality of times and the second reset transistor is off when the second photodiode is sensed for a plurality of third period of times.

13. The image sensor of claim 11 , wherein the first photodiode is sensed for a plurality of second period of times when the driving transistor is off.

14. The image sensor of claim 11 , wherein the first period of time overlaps a period of time in which the first photodiode is sensed and read, and the second period of time does not overlap the period of time in which the first photodiode is sensed and read.

15. The image sensor of claim 9 , further comprising:

a second pixel including a third photodiode and a fourth photodiode,

wherein a light receiving area of the third photodiode is larger than a light receiving area of the fourth photodiode,

wherein the first pixel is disposed directly adjacent to the second pixel, and

wherein the second photodiode is disposed directly adjacent to the fourth photodiode.

16. The image sensor of claim 9 , further comprising:

a second pixel including a third photodiode and a fourth photodiode,

wherein a light receiving area of the third photodiode is larger than a light receiving area of the fourth photodiode,

wherein the first pixel is disposed directly adjacent to the second pixel, and

wherein the second photodiode is disposed directly adjacent to the third photodiode.

Priority Claims (3)
KR 10-2018-0008297 · Jan 23, 2018 · national
KR 10-2018-0060446 · May 28, 2018 · national
KR 10-2018-0110823 · Sep 17, 2018 · national
Continuity (2)
Continuation 16218704 · Dec 13, 2018
Related Publication 20200235152A1 · Jul 23, 2020
Cited By (1)
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