IP Library › Granted Patent US 10,951,190
Granted Patent B2
US 10,951,190 · App. 16/846,520 · Granted Mar 16, 2021

On-chip harmonic filtering for radio frequency (RF) communications

Inventors: Essam S. Atalla (Round Rock, TX); Ruifeng Sun (Charlottesville, VA); Mohamed M. Elkholy (Austin, TX)
Assignee: Silicon Laboratories Inc.
H03H7/38H03F3/189H03H7/1766
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Quick Facts
Patent No.
US 10,951,190
App. No.
16/846,520
Granted
Mar 16, 2021
Kind
B2
Abstract

Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. A filtering and matching circuit for an integrated circuit includes a first capacitance coupled in parallel with a first inductance, a second inductance coupled to the first inductance, and a variable second capacitance coupled between the first and second inductance. The variable second capacitance is controlled to provide filtering with respect to the RF signal as well as impedance matching with respect to a load coupled to the connection pad. For one embodiment, the variable second capacitance includes a coarse-tune variable capacitor circuit and a fine-tune variable capacitor circuit. The coarse-tuning controls impedance matching, and the fine tuning controls a notch for the filtering. The load can be an antenna for the RF communications. The integrated circuit can include a receive path, a transmit path, or both.

Claims (39)

1. An integrated circuit, comprising:

a circuit coupled between a first node and a connection pad for the integrated circuit to provide harmonic rejection filtering of a radio frequency (RF) signal passing through the circuit and to provide impedance matching with respect to a load coupled to the connection pad, the circuit comprising:

a first inductance coupled between the first node and a second node;

a first capacitance coupled between the first node and the second node in parallel with the first inductance, wherein a total capacitance value between the first node and the second node is a non-variable capacitance value;

a variable second capacitance coupled between the second node and ground; and

a second inductance coupled between the second node and the connection pad;

wherein the first inductance, the first capacitance and the variable second capacitance form a resonant circuit that provides the harmonic rejection filtering of the RF signal by rejecting one or more harmonic frequencies of the RF signal; and

a controller coupled to control a capacitance amount for the variable second capacitance to: (a) determine the impedance matching provided by the circuit, and (b) tune a center frequency of the harmonic rejection filtering provided by the resonant circuit.

2. The integrated circuit of claim 1 , wherein two separate inductor structures are used to provide the first inductance and the second inductance, or wherein a tapped inductor structure is used to provide the first inductance and the second inductance.

3. The integrated circuit of claim 1 , wherein the controller is coupled to provide one or more control signals to the variable second capacitance based upon calibration data stored within the integrated circuit.

4. The integrated circuit of claim 1 , further comprising:

a low noise amplifier coupled to the first node and configured to receive an RF input signal from the load through the circuit; and

a power amplifier coupled to the first node and configured to transmit an RF output signal to the load through the circuit.

5. The integrated circuit of claim 1 , wherein the variable second capacitance comprises:

a first variable capacitor circuit having a coarse-tune control signal as an input from the controller; and

a second variable capacitor circuit having a fine-tune control signal as an input from the controller.

6. The integrated circuit of claim 5 , wherein the controller adjusts the coarse-tune control signal to adjust the impedance matching provided by the circuit, and wherein the controller adjusts the fine-tune control signal to adjust the center frequency of the harmonic rejection filtering provided by the resonant circuit.

7. The integrated circuit of claim 6 , wherein the controller adjusts the fine-tune control signal to tune the center frequency of the harmonic rejection filtering provided by the resonant circuit to filter a third harmonic of the RF signal.

8. The integrated circuit of claim 1 , wherein a value for the first capacitance and a nominal value for the variable second capacitance are selected to determine the impedance matching providing by the circuit, and wherein the variable second capacitance is adjusted by the controller to determine a notch frequency for the harmonic rejection filtering providing by the resonant circuit.

9. A method to operate an integrated circuit, comprising:

passing a radio frequency (RF) signal through a circuit, which is coupled between a first node and a connection pad for the integrated circuit to provide harmonic rejection filtering of the RF signal and to provide impedance matching with respect to a load coupled to the connection pad, the circuit comprising:

a first inductance coupled between the first node and a second node;

a first capacitance coupled between the first node and the second node in parallel with the first inductance, wherein a total capacitance value between the first node and the second node is a non-variable capacitance value;

a variable second capacitance coupled between the second node and ground; and

a second inductance coupled between the second node and the connection pad for the integrated circuit;

wherein the first inductance, the first capacitance and the variable second capacitance form a resonant circuit that provides the harmonic rejection filtering of the RF signal by rejecting one or more harmonic frequencies of the RF signal; and

controlling a capacitance amount for the variable second capacitance to: (a) determine the impedance matching provided by the circuit, and (b) tune a notch frequency for the harmonic rejection filtering provided by the resonant circuit.

10. The method of claim 9 , wherein two separate inductor structures are used to provide the first inductance and the second inductance, or wherein a tapped inductor structure is used to provide the first inductance and the second inductance.

11. The method of claim 9 , further comprising:

receiving, with a low noise amplifier, an RF input signal from the load through the circuit; and

transmitting, with a power amplifier, an RF output signal to the load through the circuit.

12. The method of claim 9 ,

wherein the variable second capacitance comprises a first variable capacitor circuit and a second variable capacitor circuit; and

wherein the controlling comprises:

adjusting the first variable capacitor circuit with a coarse-tune control signal; and

adjusting the second variable capacitor circuit with a fine-tune control signal.

13. The method of claim 12 , further comprising using the coarse-tune control signal to adjust the impedance matching provided by the circuit, and using the fine-tune control signal to adjust the notch frequency of the harmonic rejection filtering provided by the resonant circuit.

14. The method of claim 13 , wherein the using the fine-tune control signal comprises adjusting the fine-tune control signal to filter a third harmonic of the RF signal.

15. The method of claim 9 , wherein a value for the first capacitance and a nominal value for the variable second capacitance are set to determine the impedance matching provided by the circuit, and wherein the capacitance amount of the variable second capacitance is adjusted to adjust the notch frequency of the harmonic rejection filtering provided by the resonant circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2020
From: ATALLA, ESSAM S.; SUN, RUIFENG; ELKHOLY, MOHAMED M.
To: SILICON LABORATORIES INC.
Reel/Frame 052376/0223 →
Continuity (2)
Continuation 16506409 · Jul 9, 2019
Related Publication 20210013857A1 · Jan 14, 2021
Cited By (2)
US 12,199,651 US 12,362,776