IP Library Granted Patent US 10,938,299
Granted Patent B2
US 10,938,299 · App. 16/850,991 · Granted Mar 2, 2021

Fault detector for voltage converter

Inventors: Aichen Low (Cambridge, MA); David M. Giuliano (Brookline, MA); Gregory Szczeszynski (Hollis, NH); Jeff Summit (Jefferson, MA); Oscar Blyde (Melrose, MA)
Assignee: pSemi Corporation
H02M3/07H02M1/32H02M3/073H02M2003/075
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Quick Facts
Patent No.
US 10,938,299
App. No.
16/850,991
Granted
Mar 2, 2021
Kind
B2
Abstract

Various embodiments of a fault detector for a voltage converter are described. In one example embodiment, briefly, the fault detector is capable to detect one or more fault events during operation of a voltage converter. Likewise, the fault detector is capable to generate one or more fault signals with respect to the one or more to be detected fault events.

Claims (12)

1. An integrated circuit (IC) for use with a voltage converter, the voltage converter to comprise at least a set of switches and a set of capacitors arranged to form a switching configuration such that at least some of the switches operate in a manner to form an electrical connection of at least some of the capacitors to respective alternate voltages in successive stages of operation of the voltage converter and the voltage converter to comprise another switch to have a drain-to-source (DS) voltage rating greater than an input voltage of the voltage converter and greater than a DS voltage rating of at least one switch in the set of switches, the IC comprising: a fault detector;

the fault detector capable to detect one or more fault events during operation of the voltage converter and the fault detector capable to generate one or more fault signals with respect to the one or more to be detected fault events;

the one or more fault signals to signal the another switch to electrically disconnect or otherwise via a high impedance state to limit current flow through at least one switch in the set of switches.

2. The IC of claim 1 , wherein the respective alternate voltages comprise ground and an output voltage level.

3. The IC of claim 1 , wherein the successive stages of operation of the voltage converter to comprise two alternating clocked phases of operation of the voltage converter to be driven in a non-overlapping manner.

4. The IC of claim 1 , wherein the one or more fault events comprising at least one of the following to be detected by the fault detector at a terminal or at a node of the voltage converter: a voltage above an overvoltage threshold, a voltage below an undervoltage threshold and/or a current above an overcurrent threshold.

5. The IC of claim 4 , wherein the overvoltage threshold, the undervoltage threshold and/or the overcurrent threshold comprise programmable settings.

6. The IC of claim 4 , wherein the fault detector comprises a voltage comparator and/or a current comparator to detect at least one of the following: the voltage above the overvoltage threshold, the voltage below the undervoltage threshold and/or the current above the overcurrent threshold.

7. The IC of claim 6 , wherein the fault detector includes a logical fault indicator to generate the one or more fault signals based at least in part on one or more signals from the voltage comparator and/or the current comparator.

8. The IC of claim 7 , wherein at least one of the one or more fault signals to be generated to comprise a latched fault signal.

9. The IC of claim 1 , wherein the DS voltage ratings comprise DS voltage breakdown ratings.

10. The IC of claim 1 , wherein the another switch is included in the set of switches and the another switch to have a drain-to-source (DS) voltage rating greater than a DS voltage rating of at least one other switch in the set of switches.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF INVENTOR DAVID M. GIULIANO PREVIOUSLY RECORDED AT REEL: 053309 FRAME: 0080. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2023
From: LOW, AICHEN; GIULIANO, DAVID M.; SZCZESZYNSKI, GREGORY; SUMMIT, JEFF; BLYDE, OSCAR
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 064923/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2020
From: LOW, AICHEN; GIULIANO, DAVID M.; SZCZESZYNSKI, GREGORY; SUMMIT, JEFF; BLYDE, OSCAR
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 053309/0080 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2020
From: ARCTIC SAND TECHNOLOGIES, INC.
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 053309/0095 →
CHANGE OF NAME Recorded Jul 24, 2020
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 053311/0117 →
Continuity (4)
Continuation 15719929 · Sep 29, 2017
Continuation 14776939
Continuation 13838681 · Mar 15, 2013
Related Publication 20200366195A1 · Nov 19, 2020
Cited By (2)
US 12,212,232 US 12,218,586