IP Library › Granted Patent US 11,587,914
Granted Patent B2
US 11,587,914 · App. 16/852,522 · Granted Feb 21, 2023

LED chip and manufacturing method of the same

Inventors: Jong Min Jang (Ansan-si, KR); Chang Yeon Kim (Ansan-si, KR); Myoung Hak Yang (Ansan-si, KR)
Assignee: Seoul Viosys Co., Ltd.
H01L25/0756H01L23/3171H01L27/153H01L33/62
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Quick Facts
Patent No.
US 11,587,914
App. No.
16/852,522
Granted
Feb 21, 2023
Kind
B2
Abstract

A light emitting chip including a first LED sub-unit, a second LED sub-unit disposed on the first LED sub-unit, a third LED sub-unit disposed on the second LED sub-unit, a passivation layer disposed on the third LED sub-unit, and a first connection electrode electrically connected to at least one of the first, second, and third LED sub-units, in which the first connection electrode and the third LED sub-unit form a first angle defined between an upper surface of the third LED sub-unit and an inner surface of the first connection electrode that is less than about 80°.

Claims (52)

1. A light emitting chip, comprising:

a first LED sub-unit;

a second LED sub-unit disposed under the first LED sub-unit;

a third LED sub-unit disposed under the second LED sub-unit;

a passivation layer disposed on the first to third LED sub-units; and

a first connection electrode disposed on the passivation layer and electrically connected to at least one of the first, second, and third LED sub-units,

wherein the first connection electrode is continuously disposed over the side surfaces of the first to third LED sub-units,

wherein the first connection electrode and the third LED sub-unit form a first angle defined between an upper surface of the third LED sub-unit and an inner surface of the first connection electrode disposed over the side surfaces of the first to third LED sub-units,

wherein the first angle is greater than 0° and less than about 80°, and

wherein the first connection electrode is spaced apart from a top surface of the first LED sub-unit.

2. The light emitting chip of claim 1 , wherein the first angle is greater than about 60° and less than about 70°.

3. The light emitting chip of claim 1 , wherein the passivation layer and the third LED sub-unit form a second angle defined between the upper surface of the third LED sub-unit and an inner surface of the passivation layer that is less than about 80°.

4. The light emitting chip of claim 1 , wherein the first connection electrode has at least one surface having a curved shape.

5. The light emitting chip of claim 4 , wherein:

the passivation layer has a top surface facing the first LED sub-unit and a side surface intersecting the top surface; and

the first connection electrode contacts at least a portion of each of the top surface and the side surface of the passivation layer.

6. The light emitting chip of claim 5 , wherein the first connection electrode contacts at least a portion of a top surface of the third LED sub-unit.

7. The light emitting chip of claim 1 , wherein the first connection electrode overlaps at least a portion of each of the first, second, and third LED sub-units in a plan view.

8. The light emitting chip of claim 1 , wherein at least a portion of the passivation layer is exposed by the first connection electrode.

9. The light emitting chip of claim 1 , wherein the passivation layer exposes at least a portion of a side surface of the third LED sub-unit.

10. The light emitting chip of claim 1 , wherein the passivation layer covers side surfaces of the first and second LED sub-units.

11. The light emitting chip of claim 1 , wherein the passivation layer exposes at least a portion of a top surface of the third LED sub-unit.

12. The light emitting chip of claim 1 , further comprising:

a second connection electrode electrically connected to the first LED sub-unit;

a third connection electrode electrically connected to the second LED sub-unit; and

a fourth connection electrode electrically connected to the third LED sub-unit,

wherein:

the first connection electrode is electrically connected to each of the first, second, and third sub-units; and

each of the first, second, third, and fourth connection electrodes has a curved shape.

13. The light emitting chip of claim 12 , wherein:

each of the first, second, third, and fourth connection electrodes has a first portion disposed on a top surface of the passivation layer; and

the passivation layer is not disposed between the first portions of at least one of the first, second, third, and fourth connection electrodes.

14. The light emitting chip of claim 1 , further comprising a substrate,

wherein:

the first LED sub-unit comprises a first LED light emitting stack;

the second LED sub-unit comprises a second LED light emitting stack;

the third LED sub-unit comprises a third LED light emitting stack; and

the first, second, and third LED light emitting stacks have successively larger regions overlapping with the substrate.

15. The light emitting chip of claim 14 , wherein at least one of the light emitting stacks comprises a micro LED having a surface area less than about 10,000 square μm.

16. The light emitting chip of claim 1 , wherein the passivation layer has a substantially black color and comprises a photo-sensitive material.

17. A light emitting chip, comprising:

a substrate having a substantially rectangular shape with a plurality of corners;

a first LED sub-unit disposed on the substrate;

a second LED sub-unit disposed between the first LED sub-unit and the substrate;

a third LED sub-unit disposed between the second LED sub-unit and the substrate;

a passivation layer disposed on the substrate and covering the first to third LED sub-units; and

a first connection electrode electrically connected to at least one of the first, second, and third LED sub-units,

wherein the passivation layer exposes portions of the third LED sub-unit near each of the plurality of corners of the substrate.

18. The light emitting chip of claim 17 , wherein the first connection electrode has a first portion contacting at least a portion of the third LED sub-unit and a second portion contacting at least a portion of a top surface of the passivation layer disposed furthest away from the substrate.

19. The light emitting chip of claim 17 , wherein the first connection electrode and the third LED sub-unit form an angle defined between an upper surface of the third LED sub-unit and an inner surface of the first connection electrode,

wherein the angle is greater than 0° and less than about 80°.

20. The light emitting chip of claim 17 , wherein the first connection electrode is connected to each of the first, second, and third LED sub-units at one corner of the substrate exposed by the passivation layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2020
From: JANG, JONG MIN; KIM, CHANG YEON; YANG, MYOUNG HAK
To: SEOUL VIOSYS CO., LTD.
Reel/Frame 052436/0158 →
Continuity (3)
Provisional Application 62869972 · Jul 2, 2019
Provisional Application 62847852 · May 14, 2019
Related Publication 20200365568A1 · Nov 19, 2020
Cited By (2)
US 12,538,624 US 12,557,457