Method for forming and patterning a layer and/or substrate

1. A method for forming features for semiconductor processing, the method comprising:

forming a first mandrel and a second mandrel on a substrate, the first mandrel and the second mandrel extending parallel to a first direction along the substrate;

forming a first spacer along a first sidewall of the first mandrel and a second spacer along a second sidewall of the second mandrel, a first gap being defined between the first spacer and the second spacer;

filling the first gap by a first gap-filling material, at least one of (i) the first spacer and the second spacer, and (ii) the first gap-filling material being boron-doped silicon;

forming a third mandrel and a fourth mandrel on and across the first mandrel, the second mandrel, the first spacer, the second spacer, and the first gap-filling material, the third mandrel and the fourth mandrel extending parallel to a second direction along the substrate that intersects the first direction;

forming a third spacer along a third sidewall of the third mandrel and a fourth spacer along a fourth sidewall of the fourth mandrel, a second gap being defined between the third spacer and the fourth spacer;

removing a respective portion of (i) the first gap-filling material exposed through the second gap, or (ii) the first mandrel and the second mandrel exposed through the second gap;

filling the second gap by a second gap-filling material;

removing the third mandrel and the fourth mandrel, respective third gaps being formed by removing the third mandrel and the fourth mandrel; and

removing a respective portion of the other of (i) the first gap-filling material exposed through the third gaps, or (ii) the first mandrel and the second mandrel exposed through the third gaps.

2. The method of claim 1 , wherein the first spacer and the second spacer are boron-doped silicon.

3. The method of claim 1 , wherein the first gap-filling material is boron-doped silicon.

4. The method of claim 1 , wherein the first mandrel and the second mandrel are each carbon.

5. The method of claim 1 , wherein the first spacer and the second spacer are each silicon oxide deposited at low temperature.

6. The method of claim 5 , wherein the wet etch process comprises an etch solution having an acid etchant.

7. The method of claim 1 , wherein the first gap-filling material is carbon-doped silicon.

8. The method of claim 7 , wherein the carbon-doped silicon is deposited by flowable CVD (FCVD).

9. The method of claim 7 , wherein one of the first spacer and the second spacer is amorphous silicon.

10. The method of claim 1 , further comprising selectively removing the first spacer and the second spacer by a wet etch process, wherein the wet etch process does not etch the gap-filling material.

11. The method of claim 10 , wherein the gap is seamlessly filled by the gap-filling material.

12. The method of claim 10 , wherein the wet etch process comprises an etch solution having an alkali or alkaline etchant.

13. The method of claim 10 , wherein the boron-doped silicon has a boron concentration between 10 20 cm −3 and 10 24 cm −3 .

14. The method of claim 13 , wherein the boron concentration is at least 10 22 cm −3 .

15. The method of claim 13 , wherein the first spacer and the second spacer are each amorphous silicon.

16. The method of claim 15 , wherein the wet etch process comprises an etch solution comprising an alkali or alkaline etchant.

17. The method of claim 16 , wherein the alkali or alkaline etchant is at least one of KOH, NaOH, Ca(OH) 2 , and Ba(OH) 2 .