IP Library Granted Patent US 11,158,583
Granted Patent B2
US 11,158,583 · App. 16/854,112 · Granted Oct 26, 2021

Substrate with built-in component

Inventor: Nobutaka Aoki (Nagano, JP)
Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
H01L23/5389H01L21/4853H01L21/4857H01L23/13H01L23/49816H01L23/5383H01L23/5386H01L24/16H01L24/32H01L24/73H01L2224/16238H01L2224/32225H01L2224/73204
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Quick Facts
Patent No.
US 11,158,583
App. No.
16/854,112
Granted
Oct 26, 2021
Kind
B2
Abstract

A substrate with built-in component includes: a first wiring layer having at least one reference pattern; a first insulating layer formed on the first wiring layer; and an electronic component mounted, in a cavity formed in the first insulating layer, on the first wiring layer, wherein the at least one reference pattern includes at least one first portion crossing a side surface of the electronic component in plan view, and at least one second portion crossing a side surface of the cavity in plan view.

Claims (23)

1. A substrate with built-in component comprising:

a first wiring layer having at least one reference pattern;

a first insulating layer formed on the first wiring layer; and

an electronic component mounted, in a cavity formed in the first insulating layer, on the first wiring layer,

wherein the at least one reference pattern includes

at least one first portion crossing a side surface of the electronic component in plan view, and

at least one second portion crossing a side surface of the cavity in plan view,

wherein the at least one reference pattern has, as a scale, a plurality of slits penetrating the first wiring layer and

the plurality of slits are arranged at regular intervals in a direction inclined from a direction parallel to the side surface of the electronic component in plan view.

2. The substrate with built-in component according to claim 1 , further comprising:

a second wiring layer formed on the first insulating layer; and

a second insulating layer formed on the second wiring layer,

wherein the cavity is formed so as to be connected to the second wiring layer and the second insulating layer, and

wherein an upper surface of at least a portion of the second wiring layer is exposed from the second insulating layer in the cavity.

3. The substrate with built-in component according to claim 2 , wherein the second wiring layer has an opening pattern with two side surfaces crossing each other at an angle greater than 0 degrees at a portion where the upper surface is exposed from the second insulating layer.

4. The substrate with built-in component according to claim 1 ,

wherein the electronic component has a polygonal planar shape, and

wherein the at least one reference pattern includes a plurality of patterns corresponding to at least two sides of the polygonal shape.

5. The substrate with built-in component according to claim 1 , wherein the at least one first portion includes a plurality of first portions and the at least one second portion includes a plurality of second portions.

6. The substrate with built-in component according to claim 1 , wherein the plurality of slits include

a plurality of first slits having a first planar shape; and

a plurality of second slits having a second planar shape different from the first planar shape; and

wherein the second slits are provided for each group of a constant number of the first slits.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2020
From: AOKI, NOBUTAKA
To: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Reel/Frame 052452/0720 →
Priority Claims (1)
JP JP2019-085376 · Apr 26, 2019 · national
Continuity (1)
Related Publication 20200343192A1 · Oct 29, 2020