IP Library › Granted Patent US 11,082,655
Granted Patent B2
US 11,082,655 · App. 16/856,419 · Granted Aug 3, 2021

Solid state imaging device, method of controlling solid state imaging device, and program for controlling solid state imaging device

Inventor: Takashi Kawaguchi (Fukuoka, JP)
H04N5/378H01L27/14621H01L27/14636H01L27/14645H04N5/347H04N5/369H04N5/374H04N5/3745H04N5/37455H04N9/045H04N9/04555H04N9/04557H04N9/04559
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,082,655
App. No.
16/856,419
Granted
Aug 3, 2021
Kind
B2
Abstract

A solid state imaging device includes: a pixel array unit that has a plurality of pixels 2-dimensionally arranged in a matrix and a plurality of signal lines arranged along a column direction; A/D conversion units that are provided corresponding to the respective signal lines and convert an analog signal output from a pixel through the signal line into a digital signal; and a switching unit that switches or converts the analog signal output through each signal line into a digital signal using any of an A/D conversion unit provided corresponding to the signal line through which the analog signal is transmitted, and an A/D conversion unit provided corresponding to a signal line other than the signal line through which the analog signal is transmitted.

Claims (28)

1. An imaging device comprising:

a plurality of pixels including a first pixel, a second pixel and a third pixel;

a first signal line coupled to the first pixel;

a third signal line coupled to the second pixel;

a second signal line coupled to the second pixel, wherein the second signal line is arranged between the first signal line and the third signal line;

a first analog to digital (A/D) conversion unit coupled to the first signal line, wherein the first A/D conversion unit includes a first comparator configured to output a first determination signal based on a first signal on the first signal line, and a first counter;

a second A/D conversion unit coupled to the second signal line, wherein the second A/D conversion unit includes a second comparator configured to output a second determination signal based on a second signal on the second signal line, and a second counter;

a third A/D conversion unit coupled to the third signal line, wherein the third A/D conversion unit includes a third comparator configured to output a third determination signal based on a third signal on the third signal line, and a third counter; and

a switch circuit configured to couple the first comparator to the third counter, and to couple the third comparator to the third counter,

wherein the third counter is configured to receive the first determination signal and the third determination signal.

2. The imaging device according to claim 1 ,

wherein the switch circuit includes a first switch circuit configured to couple an output terminal of the first comparator to an input terminal of the third counter;

wherein the switch circuit includes a second switch circuit configured to couple an output terminal of the third comparator to the input terminal of the third counter.

3. The imaging device according to claim 2 ,

wherein the switch circuit includes a third switch circuit configured to couple the output terminal of the first comparator to an input terminal of the first counter.

4. An imaging device comprising:

a plurality of pixels arranged in columns and rows, the plurality of pixels including a first pixel and a second pixel;

a first signal line coupled to the first pixel;

a second signal line coupled to a second pixel;

a first analog to digital (A/D) conversion (A/D conversion) unit including a first comparator configured to output a first determination signal based on a first signal on the first signal line, and a first counter, the first A/D conversion unit coupled to the first signal line;

a second A/D conversion unit including a second comparator configured to output a second determination signal based on a second signal on the second signal line, and a second counter, the second A/D conversion unit coupled to the second signal line, the second comparator arranged not next to the first comparator in a row direction; and

a switch circuit configured to couple the first comparator to the first counter, and couple the second comparator to the first counter,

wherein the first counter is configured to receive the first determination signal and the second determination signal.

5. The imaging device according to claim 4 ,

wherein the switch circuit includes a first switch circuit configured to couple an output terminal of the first comparator to an input terminal of the first counter;

wherein the switch circuit includes a second switch circuit configured to couple to an output terminal of the second comparator to the input terminal of the first counter.

6. The imaging device according to claim 5 ,

wherein the switch circuit includes a third switch circuit configured to couple the output terminal of the second comparator to the input terminal of the second counter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2021
From: KAWAGUCHI, TAKASHI
To: SONY CORPORATION
Reel/Frame 055117/0665 →
Priority Claims (1)
JP 2011-207368 · Sep 22, 2011 · national
Continuity (7)
Division 15701632 · Sep 12, 2017
Continuation 15490590 · Apr 18, 2017
Continuation 15397631 · Jan 3, 2017
Division 15298574 · Oct 20, 2016
Continuation 14622681 · Feb 13, 2015
Continuation 13598986 · Aug 30, 2012
Related Publication 20200252566A1 · Aug 6, 2020