MRAM structure with ternary weight storage
A memory device is provided that includes at least one MTJ pillar which can have a ternary program state as compared to a binary program state in a conventional device. The MTJ pillar contains a lower MTJ structure that includes at least a first magnetic reference material, a first tunnel barrier and a first magnetic free layer material, and an upper MTJ structure that includes at least a second magnetic reference material, a second tunnel barrier and a second magnetic free layer material; the upper MTJ structure is stacked atop the lower MTJ structure. The first and second magnetic free layer materials have different designs and/or compositions resulting in different switching voltages.
1. A memory device comprising:
at least one magnetic tunnel junction (MTJ) pillar containing a lower MTJ structure and an upper MTJ structure that are electrically connected to each other, wherein the lower MTJ structure has a different switching voltage from the upper MTJ structure; and
a bottom electrode located beneath the at least one MTJ pillar and in direct physical contact with a bottommost surface of the lower MTJ structure, wherein the bottom electrode is present on a recessed surface of a first electrically conductive structure, and both the bottom electrode and the first electrically conductive structure are embedded in a layer of a single interconnect dielectric material, and wherein the bottom electrode has a topmost surface that is coplanar with a topmost surface of the layer of the single interconnect dielectric material, and the first electrically conductive structure has a topmost surface that is located between the topmost surface of the layer of the single interconnect dielectric material and a bottommost surface of the layer of the single interconnect dielectric material.
2. The memory device of claim 1 , wherein the MTJ pillar forms a ternary magnetoresistive random access memory (MRAM) weight storage.
3. The memory device of claim 1 , wherein the lower MTJ structure and the upper MTJ structure are both bottom pinned MTJ stack structures.
4. The memory device of claim 3 , wherein the lower MTJ structure comprises a first magnetic reference material, a first tunnel barrier material, a first magnetic free layer material, and a first connecting electrode, and the upper MTJ structure comprises a second magnetic reference material, a second tunnel barrier material, a second magnetic free layer material, and a second connecting electrode, wherein the first connecting electrode electrically connects the lower MTJ structure to the upper MTJ structure.
5. The memory device of claim 4 , wherein the first magnetic free layer material is compositionally or structurally different from the second magnetic free layer material.
6. The memory device of claim 4 , wherein the upper MTJ structure and the lower MTJ structure have a same diameter.
7. The memory device of claim 3 , wherein the lower MTJ structure has a diameter that differs from a diameter of the upper MTJ structure.
8. The memory device of claim 1 , wherein the lower MTJ structure and the upper MTJ structure are both top pinned MTJ stack structures.
9. The memory device of claim 8 , wherein the lower MTJ structure comprises a first magnetic free layer material, a first tunnel barrier material, a first magnetic reference material, and a first connecting electrode, and the upper MTJ structure comprises a second magnetic free layer material, a second tunnel barrier material, a second magnetic reference material, and a second connecting electrode, wherein the first connecting electrode electrically connects the lower MTJ structure to the upper MTJ structure.
10. The memory device of claim 9 , wherein the first magnetic free layer material is compositionally or structurally different from the second magnetic free layer material.
11. The memory device of claim 9 , wherein the upper MTJ structure and the lower MTJ structure have a same diameter.
12. The memory device of claim 9 , wherein the lower MTJ structure has a diameter that differs from a diameter of the upper MTJ structure.
13. The memory device of claim 1 , wherein the lower MTJ structure is switched independently from the upper MTJ structure.
14. The memory device of claim 1 , wherein the at least one MTJ pillar is located between the bottom electrode, and a topmost connecting electrode of the MTJ pillar.
15. The memory device of claim 14 , wherein the topmost connecting electrode of the at least one MTJ pillar is connected to a second electrically conductive structure that is located above the at least one MTJ pillar.
16. The memory device of claim 1 , wherein the at least one MTJ pillar has a lateral dimension that is greater than a lateral dimension of the bottom electrode and the first electrically connective structure.
17. The memory device of claim 1 , wherein the topmost surface of each of the layer of the single interconnect dielectric material and the bottom electrode is entirely planar.