IP Library Granted Patent US 11,355,554
Granted Patent B2
US 11,355,554 · App. 16/870,239 · Granted Jun 7, 2022

Sense lines in three-dimensional memory arrays, and methods of forming the same

Inventors: Lingming Yang (Meridian, ID); Karthik Sarpatwari (Boise, ID); Fabio Pellizzer (Boise, ID); Nevil N. Gajera (Meridian, ID); Lei Wei (Boise, ID)
Assignee: Micron Technology, Inc.
H01L27/249H01L23/528H01L23/53257H01L45/06H01L45/1226H01L45/1253H01L45/144H01L45/1675
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Quick Facts
Patent No.
US 11,355,554
App. No.
16/870,239
Granted
Jun 7, 2022
Kind
B2
Abstract

An example apparatus includes a three-dimensional (3D) memory array including a sense line and a plurality of vertical stacks. Each respective on of the vertical stacks includes a different respective portion of the sense line, a first memory cell coupled to that portion of the sense line, a second memory cell coupled to that portion of the sense line, a first access line coupled to the first memory cell and a second access line coupled to the second memory cell. The first and second access lines are perpendicular to the sense line.

Claims (44)

1. An apparatus, comprising:

a three-dimensional (3D) memory array including:

a sense line that includes vertical portions and horizontal portions; and

a plurality of vertical stacks, wherein each respective one of the vertical stacks includes:

a different respective vertical portion of the sense line, wherein the different respective vertical portion of the sense line of each respective vertical stack is in contact with multiple layers of its respective vertical stack;

a first memory cell coupled to the different respective vertical portion of the sense line;

a second memory cell coupled to the different respective vertical portion of the sense line;

a first access line coupled to the first memory cell, wherein the first access line is perpendicular to the different respective vertical portion of the sense line; and

a second access line coupled to the second memory cell, wherein the second access line is perpendicular to the different respective vertical portion of the sense line.

2. The apparatus of claim 1 , wherein the first and second memory cells each include a storage element material and a plurality of electrodes.

3. The apparatus of claim 2 , wherein the storage element material is a chalcogenide material.

4. The apparatus of claim 1 , wherein the first and second memory cells are coupled to opposing sides of the different respective vertical portion of the sense line.

5. The apparatus of claim 1 , wherein each respective one of the vertical stacks includes:

a third memory cell coupled to the different respective vertical portion of the sense line;

a fourth memory cell coupled to the different respective vertical portion of the sense line;

a third access line coupled to the third memory cell, wherein the third access line is perpendicular to the different respective vertical portion of the sense line; and

a fourth access line coupled to the fourth memory cell, wherein the fourth access line is perpendicular to the different respective vertical portion of the sense line.

6. The apparatus of claim 1 , wherein the different respective vertical portions of the sense line are connected by the horizontal portions of the sense line at a top portion of the vertical stacks.

7. The apparatus of claim 1 , wherein the different respective vertical portions of the sense line are connected by the horizontal portions of the sense line at a bottom portion of the vertical stacks.

8. An apparatus, comprising:

a three-dimensional (3D) memory array, including:

a sense line, wherein the sense line includes vertical portions and horizontal portions; and

a plurality of vertical stacks, wherein each respective one of the vertical stacks include:

a different respective vertical portion of the sense line, wherein:

the different respective vertical portion of the sense line of each respective vertical stack is in contact with multiple layers of its respective vertical stack; and

the different respective vertical portions of the sense line are connected by the horizontal portions of the sense line at a top portion of the vertical stacks and a bottom portion of the vertical stacks;

a first memory cell and a second memory cell coupled to opposing sides of the different respective vertical portion of the sense line; and

a first access line and a second access line coupled to the first memory cell and the second memory cell, respectively, wherein the first access line and the second access line are perpendicular to the different respective vertical portion of the sense line.

9. The apparatus of claim 8 , wherein the horizontal portion of the sense line at the bottom portion of the vertical stacks is formed in a substrate material of the 3D memory array.

10. The apparatus of claim 8 , wherein the horizontal portion of the sense line at the top portion of the vertical stacks is aligned with the horizontal portion of the sense line at the bottom portion of the vertical stacks.

11. The apparatus of claim 8 , wherein the sense line is a titanium nitride (TiN) material.

12. The apparatus of claim 8 , wherein activating the horizontal portion of the sense line at the bottom portion or the top portion of the vertical stacks activates the different respective vertical portions of the sense line of each vertical stack.

13. An apparatus, comprising:

a three-dimensional (3D) memory array, including:

a sense line, wherein the sense line includes vertical portions and horizontal portions; and

a plurality of vertical stacks, wherein each respective one of the vertical stacks includes:

a different respective vertical portion of the sense line, wherein:

the different respective vertical portion of the sense line of each respective vertical stack is in contact with multiple layers of each of its respective vertical stack; and

the different respective vertical portions of the sense line of some vertical stacks are connected to a horizontal portion of the sense line at a top portion of those vertical stacks and the different respective vertical portions of the sense line of other vertical stacks are connected to a horizontal portion of the sense line at a bottom portion of those vertical stacks;

a first memory cell and a second memory cell coupled to opposing sides of the different respective vertical portion of the sense line; and

a first access line and a second access line coupled to the first memory cell and the second memory cell, respectively, wherein the first access line and the second access line are perpendicular to the different respective vertical portion of the sense line.

14. The apparatus of claim 13 , wherein the vertical portions of the sense line that are connected to the horizontal portion of the sense line at the top portion of the vertical stacks are not connected to the horizontal portion of the sense line at the bottom portion of the vertical stacks.

15. The apparatus of claim 13 , wherein the vertical portions of the sense line that are connected to the horizontal portion of the sense line at the bottom portion of the vertical stacks are not connected to the horizontal portion of the sense line at the top portion of the vertical stacks.

16. The apparatus of claim 13 , wherein the different respective vertical portions of the sense line of some vertical stacks are connected to the horizontal portion of the sense line at the top portion and the bottom portion of those vertical stacks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2020
From: YANG, LINGMING; SARPATWARI, KARTHIK; PELLIZZER, FABIO; GAJERA, NEVIL N.; WEI, LEI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 052612/0399 →
Continuity (1)
Related Publication 20210351234A1 · Nov 11, 2021