Spectrum analyzer and method of controlling the same

1. A spectrum analyzer comprising:

an analog-to-digital converter (ADC) for converting a bandwidth part (BWP) signal, which is at least one analog unit frequency band signal, into a digital data sample at a predetermined sample rate according to a span set by a user;

a digital sweep part for sweeping the data sample passed through the ADC while digitally decimating the data sample through a decimation processing block having a two-stage cascaded structure, and processing the swept data sample to increase a frequency sweep speed; and

a control unit for controlling the digital sweep part according to various items input, set, and selected by the user to perform spectrum analysis and output a result of the spectrum analysis,

wherein the digital sweep part includes:

a gate unit which functions to analyze a spectrum in synchronization with a desired signal section; and

first and second decimation processing blocks respectively including first and second input buffers connected in the two-stage cascaded structure to store data used while sweeping frequencies, first and second direct digital synthesizers (DDS) configured by a numerically-controlled oscillator (NCO) to function as a local oscillator (LO) for generating a conversion frequency which is required for digital frequency sweep, and first and second cascaded integrator-comb (CIC) filters for reducing an amount of processing target data by performing decimation required for data processing which is suitable for a resolution bandwidth (RBW) set by the user.

2. The spectrum analyzer of claim 1 , further comprising an RF processing part for RF-sweeping and outputting an input RF signal corresponding to at least one BWP signal according to the span set by the user.

3. The spectrum analyzer of claim 2 , further comprising:

an input user interface (UI) for receiving, from the user, a desired measurement item and various set values required for measuring the measurement item, including the span, the RBW, and a video bandwidth (VBW); and

an output UI for displaying a measurement result to allow the user to recognize the measurement result,

wherein the RF processing part, the ADC, the control unit, and the digital sweep part are configured together in a same main body, and

the input UI and the output UI are mounted on a terminal separate from the main body to transmit and receive UI data to and from the main body through wireless communication.

4. The spectrum analyzer of claim 1 , further comprising:

an RBW filter for performing RBW filtering;

a VBW filter for performing a VBW filtering function;

an envelope detector for extracting a waveform of an output signal of the RBW filter;

a third CIC filter for performing decimation or interpolation suitable for an RBW-to-VBW ratio (RBW/VBW); and

a detector for extracting four VBW output values of a maximum value (max), a minimum value (min), a sum, and a sample for an output of the VBW filter.

5. The spectrum analyzer of claim 1 , wherein signal synchronization at the gate unit is performed by using an internal frame synchronization signal, a GPS signal, 1-pulse-per-second (1PPS) signal, or a 5G new radio (NR) sync signal block (SSB) signal.

6. The spectrum analyzer of claim 5 , wherein a decimation rate (N d1 ) of the first CIC filter and a decimation rate (N d2 ) of the second CIC filter are multiplied to obtain a total decimation rate (N d =N d1 *N d2 ).

7. The spectrum analyzer of claim 5 , wherein the data stored in the first and second input buffers is reused without receiving additional data during the digital frequency sweep.

8. The spectrum analyzer of claim 5 , wherein the control unit stores, in a lookup table, decimation rates (N d1 and N d2 ) of the first and second CIC filters and a total decimation rate (N d =N d1 *N d2 ), which is a multiplication of the decimation rates (N d1 and N d2 ), to support a plurality of RBWs for ADC output data.