Efficient metal-insulator-metal capacitor

1. A capacitor structure comprising:

a first metallic layer formed over a substrate that comprises at least one first region and at least one second region, a surface of the substrate in the at least one second region including a cavity below the surface of the substrate in the at least one first region;

a bottom contact in the substrate, the bottom contact having a top surface connected to the first metallic layer;

an insulator formed over the first metallic layer; and

a second metallic layer formed over the insulator,

wherein the substrate includes a dielectric layer, the bottom contact having side and bottom surfaces in contact with the dielectric layer.

2. The capacitor structure of claim 1 , wherein the substrate includes the dielectric layer, the cavity extending into the dielectric layer.

3. The capacitor structure of claim 1 , wherein the cavity extends a selected depth into the dielectric layer, the selected depth being lower than the top surface of the bottom contact.

4. The capacitor structure of claim 1 , wherein the bottom contact is within the first region and coupled to the first metallic layer.

5. The capacitor structure of claim 1 , wherein the cavity extends a selected depth into the dielectric layer, the selected depth being lower than the bottom surface of the bottom contact.

6. The capacitor structure of claim 1 , wherein the substrate includes (i) the dielectric layer, (ii) the bottom contact aligned with the first metallic layer, the bottom contact having side and bottom surfaces at least partially surrounded by the dielectric layer and (iii) the top surface coupled with the first metallic layer, the cavity extending a selected depth into the dielectric layer, the selected depth being lower than the top surface of the bottom contact.

7. A capacitor structure comprising:

a first metallic layer formed over a substrate that comprises at least one first region and at least one second region, a surface of the substrate in the at least one second region including a cavity below the surface of the substrate in the at least one first region;

an insulator formed over the first metallic layer; and

a second metallic layer formed over the insulator,

wherein the substrate includes (i) a dielectric layer, (ii) a bottom contact aligned with the first metallic layer, the bottom contact having side and bottom surfaces at least partially surrounded by the dielectric layer and (iii) a top surface coupled with the first metallic layer.

8. A method for forming a capacitor structure comprising:

forming a conductive contact in an interlayer dielectric layer provided on a substrate;

forming a mask over the conductive contact and the interlayer dielectric layer;

etching areas not covered by the mask, to expose a first region that includes the conductive contact and to form a second region that includes a cavity within the interlayer dielectric layer;

forming a first metallic layer over and between the first and second regions, the first metallic layer overlying and coupled to a top surface of the conductive contact;

forming an insulator over the first metallic layer; and

forming a second metallic layer over the insulator.

9. The method for forming the capacitor structure of claim 8 , wherein the cavity is formed to extend to a depth below the top surface the conductive contact.

10. The method for forming the capacitor structure of claim 9 , wherein the first metallic layer extends into the cavity to a depth that is below the top surface the conductive contact.

11. A metal-insulator-metal capacitor structure comprising:

a first metallic layer disposed on at least a first cavity, a first hardmask region, and a first contact;

a first dielectric layer disposed on the first metallic layer;

a second metallic layer disposed on the first dielectric layer;

wherein, a bottom surface of the first contact and a bottom surface of the first cavity are both disposed in a first interlayer dielectric layer; and

wherein a second contact, coupled to the second metallic layer, is disposed in a second interlayer dielectric layer.

12. The metal-insulator-metal capacitor structure of claim 11 , wherein the bottom surface of the first cavity is disposed at a depth below the bottom surface of the first contact.

13. A metal-insulator-metal capacitor structure comprising:

a plurality of horizontal sections;

a plurality of cavity sections;

a first metallic layer;

a first dielectric layer disposed on the first metallic layer; and

a second metallic layer disposed on the first dielectric layer,

wherein the first and second metallic layers are substantially horizontal in the plurality of horizontal sections,

wherein the first metallic layer is substantially U-shaped and the second metallic layer is substantially T-shaped in the plurality of cavity sections,

wherein at least a first cavity section of the plurality of cavity sections has a first depth,

at least a second cavity section of the plurality of cavity sections has a second depth, and

the second depth is different from the first depth.

14. The metal-insulator-metal capacitor structure of claim 13 , wherein:

at least a third cavity section of the plurality of cavity sections has a third depth; and

the third depth is different from the first depth and the second depth.

15. The metal-insulator-metal capacitor structure of claim 13 , wherein (i) first contacts to the first metallic layer and (ii) second contacts to the second metallic layers are disposed in different interlayer dielectric layers.

16. The metal-insulator-metal capacitor structure of claim 13 , wherein the plurality of cavity sections are spaced periodically with respect to each other.

17. The metal-insulator-metal capacitor structure of claim 13 , wherein a deepest cavity section of the plurality of cavity sections extends to a depth below a bottom surface of a contact to the first metallic layer.