IP Library Granted Patent US 11,277,127
Granted Patent B1
US 11,277,127 · App. 16/875,029 · Granted Mar 15, 2022

Intelligent multi-level voltage gate driving system for semiconductor power devices

Inventors: H. Alan Mantooth (Fayetteville, AR); Shuang Zhao (Gardena, CA); Audrey Dearien (Dallas, TX)
H03K17/6871G05F1/575H02M7/483H03K17/04206H03K17/161H03K17/567H03K17/693H03K2217/0036
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Quick Facts
Patent No.
US 11,277,127
App. No.
16/875,029
Granted
Mar 15, 2022
Kind
B1
Abstract

An improved gate driver using a microcontroller (uC), a voltage selector (VS), an adjustable voltage regulator (AVR), and an auxiliary current sinking circuit (ACSC) to actively provide selectable drive signals either higher, lower or equal to the basic on voltage and off voltage drive signals for a selected semiconductor device thereby providing an active voltage-mode gate driver for actively speeding up or slowing both the on time and off time transitions of a semiconductor.

Claims (21)

1. An improved gate driver for power converter using a semiconductor power device controlled by a gate input, the improved gate driver comprising:

a microcontroller,

an adjustable voltage regulator connected to the microcontroller;

an auxiliary current sinking circuit connected to the microcontroller;

a voltage selector connected to the microcontroller, the gate input, and the auxiliary current sinking circuit and generating an output signal connected to the gate input;

wherein the microcontroller can actively-vary the output signal for selectively changing both the on time and off time transitions of the semiconductor power device.

2. An improved gate driver for providing a gate signal to a semiconductor device, comprising:

a power supply providing a basic voltage;

an adjustable voltage regulator providing an adjusted voltage different from the basic voltage;

a voltage selector receiving both the basic voltage and the adjusted voltage and selectively applying one of the received voltages as the gate signal; and

an auxiliary current sinking circuit electrically connected between the adjusted voltage regulator and the voltage selector.

3. A power converter utilizing a main controller providing a first pulse width modulation signal and a second pulse width modulation signal, a high side semiconductor series connected to a low side semiconductor, the high side semiconductor operated by a high side drive signal, the low side semiconductor operated by a low side drive signal, and a power supply providing a basic on drive voltage and a basic off drive voltage, the power converter comprising:

a high side on adjustable voltage regulator generating an adjusted high side on drive voltage;

a high side off adjustable voltage regulator generating an adjusted high side off drive voltage;

a high side voltage selector receiving the basic on drive voltage, off drive voltage, adjusted high side on drive voltage, and adjusted high side off drive voltage and selectively providing one of the high side received voltages as the high side gate drive signal;

a low side on adjustable voltage regulator generating an adjusted low side on drive voltage;

a low side off adjustable voltage regulator generating an adjusted low side off drive voltage;

a low side voltage selector receiving the basic on drive voltage, off drive voltage adjusted low side on drive voltage, and adjusted low side off drive voltage and selectively providing one of the low side received voltages as the low side gate drive signal.

4. A power converter utilizing a semiconductor device operated by a drive signal and a power supply providing a basic on drive voltage and a basic off drive voltage, the power converter comprising:

an adjustable voltage regulator generating an adjusted-on drive voltage across a voltage extending from above the basic on drive voltage to below the basic on drive voltage; and

a voltage selector receiving the basic on drive voltage and adjusted-on drive voltage and selectively providing one of the received voltages as the drive signal.

Assignments (2)
CONFIRMATORY LICENSE Recorded Dec 5, 2023
From: UNIVERSITY OF ARKANSAS AT FAYETTEVILLE
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 065788/0106 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2021
From: MANTOOTH, H. ALAN; ZHAO, SHUANG; DEARIEN, AUDREY
To: BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSAS
Reel/Frame 055178/0841 →
Continuity (1)
Provisional Application 62848274 · May 15, 2019
Cited By (4)
US 12,328,028 US 12,567,794 US 12,592,627 US 12,658,777