Display device having an emission layer
A display device includes signal lines and pixels connected thereto. A first pixel includes a first transistor including a first gate electrode, a first channel region overlapping the first gate electrode, a first source region, and a second drain region facing the first source region, with the first channel region interposed between the first source region and the second drain region. A third transistor includes a third gate electrode, a third channel region overlapping the third gate electrode, a third drain region connected to the first gate electrode, and a third source region facing the third drain region with the third channel region interposed between the third source region and the third drain region. A shielding part overlaps a boundary between the third source region and the third channel region and does not overlap a boundary between the third drain region and the third channel region.
1. A display device, comprising:
a plurality of signal lines comprising a first scan line;
a plurality of pixels connected to the plurality of signal lines; and
a conductive pattern,
wherein each of the plurality of pixels comprising a pixel electrode, and a plurality of transistors,
wherein the plurality of transistors comprises:
a first transistor including a first gate electrode, a first channel region overlapping the first gate electrode in a plan view, and a first source region and a first drain region opposing each other with respect to the first channel region;
a second transistor including a second gate electrode of the first scan line, a second channel region overlapping the second gate electrode, a second drain region electrically connected to the first gate electrode, and a second source region opposing the second drain region with respect to the second channel region; and
a third transistor including a third gate electrode of the first scan line, a third channel region overlapping the third gate electrode, a third drain region extending from the second source region, and a third source region opposing the third drain region with respect to the third channel region,
wherein the pixel electrode or the conductive pattern overlaps at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region,
wherein the plurality of pixels comprises first color pixels, second color pixels, and third color pixels,
wherein the pixel electrodes of the first color pixels and the pixel electrodes of the second color pixels are alternately arranged in a horizontal direction,
wherein the pixel electrodes of the first color pixels and the pixel electrodes of the third color pixels are alternately arranged in a first diagonal direction with respect to the horizontal direction,
wherein the pixel electrodes of the second color pixels and the pixel electrodes of the third color pixels are alternately arranged in a second diagonal direction with respect to the horizontal direction, and
wherein the third source region of the third transistor is directly connected to the first drain region of the first transistor.
2. The display device of claim 1 , wherein
the plurality of pixels comprises a first pixel and a second pixel, and
the pixel electrode overlaps at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region in the first pixel.
3. The display device of claim 2 , wherein the conductive pattern is disposed in a same layer as the pixel electrode.
4. The display device of claim 3 , wherein the conductive pattern overlaps at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region in the second pixel.
5. The display device of claim 1 , wherein
the plurality of signal lines at least partially overlaps the plurality of transistors.
6. The display device of claim 5 , wherein
the plurality of signal lines at least partially overlaps a channel region of the plurality of transistors.
7. The display device of claim 1 , further comprising:
a second scan line of the plurality of signal lines; and
a fourth transistor including a fourth gate electrode of the second scan line, a fourth channel region overlapping the fourth gate electrode, a fourth drain region electrically connected to the first gate electrode and extending from the second drain region, and a fourth source region opposing the fourth drain region with respect to the fourth channel region.
8. The display device of claim 7 , further comprising:
a driving voltage line for transmitting a driving voltage,
wherein the driving voltage line overlaps a boundary between the fourth source region and the fourth channel region and a boundary between the fourth drain region and the fourth channel region.
9. The display device of claim 1 , wherein the conductive pattern includes a straight part and an oblique part that are alternately arranged.
10. A display device, comprising:
a plurality of signal lines comprising a first scan line;
a plurality of pixels connected to the plurality of signal lines; and
a conductive pattern,
wherein each of the plurality of pixels comprising a pixel electrode, and a plurality of transistors,
wherein the plurality of transistors comprises:
a first transistor including a first gate electrode, a first channel region overlapping the first gate electrode in a plan view, and a first source region and a first drain region opposing each other with respect to the first channel region;
a second transistor including a second gate electrode of the first scan line, a second channel region overlapping the second gate electrode, a second drain region electrically connected to the first gate electrode, and a second source region opposing the second drain region with respect to the second channel region; and
a third transistor including a third gate electrode of the first scan line, a third channel region overlapping the third gate electrode, a third drain region extending from the second source region, and a third source region opposing the third drain region with respect to the third channel region,
wherein the pixel electrode or the conductive pattern overlaps at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region, and
wherein the plurality of pixels comprises first color pixels, second color pixels, and third color pixels,
the pixel electrodes of the first color pixels and the pixel electrodes of the second color pixels are alternately arranged in a horizontal direction,
the pixel electrodes of the first color pixels and the pixel electrodes of the third color pixels are alternately arranged in a first diagonal direction with respect to the horizontal direction, and
the pixel electrodes of the second color pixels and the pixel electrodes of the third color pixels are alternately arranged in a second diagonal direction with respect to the horizontal direction
wherein the display device further comprises:
a shielding part overlapping at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region.
11. The display device of claim 10 , further comprising:
a first connector connected to the first gate electrode and disposed in a different conductive layer from the first gate electrode,
wherein the second drain region is electrically connected to the first gate electrode via the first connector.
12. The display device of claim 11 , wherein the shielding part is in a same conductive layer as the first connector, and separated from the first connector.
13. A display device, comprising:
a plurality of signal lines comprising a first scan line;
a plurality of pixels connected to the plurality of signal lines; and
a shielding part,
wherein each of the plurality of pixels comprising a pixel electrode, and a plurality of transistors,
wherein the plurality of transistors comprises:
a first transistor including a first gate electrode, a first channel region overlapping the first gate electrode in a plan view, and a first source region and a first drain region opposing each other with respect to the first channel region;
a second transistor including a second gate electrode of the first scan line, a second channel region overlapping the second gate electrode, a second drain region electrically connected to the first gate electrode, and a second source region opposing the second drain region with respect to the second channel region; and
a third transistor including a third gate electrode of the first scan line, a third channel region overlapping the third gate electrode, a third drain region extending from the second source region, and a third source region opposing the third drain region with respect to the third channel region,
wherein the shielding part overlaps at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region, and
wherein the plurality of pixels comprises first color pixels, second color pixels, and third color pixels,
the pixel electrodes of the first color pixels and the pixel electrodes of the second color pixels are alternately arranged in a horizontal direction,
the pixel electrodes of the first color pixels and the pixel electrodes of the third color pixels are alternately arranged in a first diagonal direction with respect to the horizontal direction, and
the pixel electrodes of the second color pixels and the pixel electrodes of the third color pixels are alternately arranged in a second diagonal direction with respect to the horizontal direction.
14. The display device of claim 13 , wherein
the pixel electrode overlaps at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region in a first pixel of the plurality of pixels.
15. The display device of claim 14 , further comprising a conductive pattern disposed in a same layer as the pixel electrode.
16. The display device of claim 15 , wherein the conductive pattern overlaps at least a portion of the second source region or the second drain region, and at least a portion of the third source region or the third drain region in a second pixel of the plurality of pixels.
17. The display device of claim 13 , further comprising:
a first connector connected to the first gate electrode and disposed in a different conductive layer from the first gate electrode,
wherein the second drain region is electrically connected to the first gate electrode via the first connector.
18. The display device of claim 17 , wherein the shielding part is spaced apart from the first connector in the plan view.
19. The display device of claim 13 , further comprising:
a second scan line of the plurality of signal lines; and
a fourth transistor including a fourth gate electrode of the second scan line, a fourth channel region overlapping the fourth gate electrode, a fourth drain region electrically connected to the first gate electrode and extending from the second drain region, and a fourth source region opposing the fourth drain region with respect to the fourth channel region.
20. The display device of claim 19 , further comprising:
a driving voltage line for transmitting a driving voltage,
wherein the driving voltage line overlaps a boundary between the fourth source region and the fourth channel region and a boundary between the fourth drain region and the fourth channel region.