IP Library › Granted Patent US 11,360,905
Granted Patent B2
US 11,360,905 · App. 16/882,390 · Granted Jun 14, 2022

Write merging on stores with different privilege levels

Inventors: Naveen Bhoria (Plano, TX); Timothy David Anderson (University Park, TX); Pete Hippleheuser (Murphy, TX)
Assignee: Texas Instmments Incorporated
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Quick Facts
Patent No.
US 11,360,905
App. No.
16/882,390
Granted
Jun 14, 2022
Kind
B2
Abstract

A caching system including a first sub-cache, a second sub-cache, coupled in parallel with the first sub-cache, for storing write-memory commands that are not cached in the first sub-cache, the second sub-cache including privilege bits configured to store an indication that a corresponding cache line of the second sub-cache is associated with a level of privilege, and wherein the second sub-cache is further configured to receive a first write memory command for a memory address associated with a first level of privilege, store, in the second sub-cache, first data associated with the first write memory command and the level of privilege associated with the cache line, receive a second write memory command for the cache line, the second write memory command associated with a second level of privilege, merge the first level of privilege with the second level of privilege, and output the merged privilege level with the cache line.

Claims (48)

1. A caching system comprising:

a first sub-cache;

a second sub-cache, coupled in parallel with the first sub-cache, for storing cache data evicted from the first sub-cache and write-memory commands that are not cached in the first sub-cache, the second sub-cache including privilege bits configured to store an indication that a corresponding cache line of the second sub-cache is associated with a level of privilege, and wherein the second sub-cache is further configured to:

receive a first write memory command for a memory address, the first write memory command associated with a first level of privilege;

store, in a cache line of the second sub-cache, first data associated with the first write memory command;

store, in the second sub-cache, the level of privilege associated with the cache line;

receive a second write memory command for the cache line, the second write memory command associated with a second level of privilege;

merge the first level of privilege with the second level of privilege to produce a merged level of privilege;

store the merged level of privilege; and

output the merged level of privilege with the cache line.

2. The caching system of claim 1 , wherein the indication of the level of privilege is stored in a bit field in a portion of the second sub-cache that is configured to track modified, exclusive, shared, and invalid (MESI) states of entries in the second sub-cache.

3. The caching system of claim 2 , wherein the level of privilege comprises a two part privilege level.

4. The caching system of claim 3 , wherein the bit field includes two bits for storing the level of privilege.

5. The caching system of claim 1 , wherein the second sub-cache includes a privilege merge table, the privilege merge table indicating how different levels of privilege are merged.

6. The caching system of claim 5 , wherein the privilege merge table is predefined.

7. The caching system of claim 1 , wherein merging the first level of privilege with the second level of privilege comprises selecting a lower of the first level of privilege and the second level of privilege.

8. A method for caching data, comprising:

receiving, by a caching system, a first write memory command for a memory address, the first write memory command associated with a first level of privilege;

determining, by a first sub-cache of the caching system, that the memory address is not cached in the first sub-cache;

determining, by second sub-cache of the caching system, that the memory address is not cached in the second sub-cache, wherein the second sub-cache is configured to store, in parallel with the first sub-cache, cache data evicted from the first sub-cache and write-memory commands that are not cached in the first sub-cache;

storing first data associated with the first write memory command in a cache line of the second sub-cache;

storing the first level of privilege in the second sub-cache;

receiving a second write memory command for the cache line, the second write memory command associated with a second level of privilege;

merging the first level of privilege with the second level of privilege to produce a merged level of privilege;

storing the merged level of privilege; and

outputting the merged level of privilege with the cache line.

9. The method of claim 8 , wherein the first level of privilege comprises a two part privilege level.

10. The method of claim 9 , wherein the second sub-cache includes two bits in a bit field for storing the first level of privilege.

11. The method of claim 8 , wherein the merging is based on a privilege merge table indicating how different levels of privilege are merged.

12. The method of claim 11 , wherein the privilege merge table is predefined.

13. The method of claim 8 , wherein merging the first level of privilege with the second level of privilege comprises selecting a lower of the first level of privilege and the second level of privilege.

14. A device comprising:

a processor;

a first sub-cache; and

a second sub-cache coupled in parallel with the first sub-cache, for storing cache data evicted from the first sub-cache and write-memory commands that are not cached in the first sub-cache, the second sub-cache including privilege bits configured to store an indication that a corresponding cache line of the second sub-cache is associated with a level of privilege, and wherein the second sub-cache is further configured to:

receive a first write memory command for a memory address, the first write memory command associated with a first level of privilege;

store, in a cache line of the second sub-cache, first data associated with the first write memory command;

store, in the second sub-cache, the level of privilege associated with the cache line;

receive a second write memory command for the cache line, the second write memory command associated with a second level of privilege;

merge the first level of privilege with the second level of privilege to produce a merged level of privilege;

store the merged level of privilege; and

output the merged level of privilege with the cache line.

15. The device of claim 14 , wherein the indication of the level of privilege is stored in a bit field in a portion of the second sub-cache configured to track modified, exclusive, shared, and invalid (MESI) states of entries in the second sub-cache.

16. The device of claim 15 , wherein the level of privilege comprises a two part privilege level.

17. The device of claim 16 , wherein the bit field includes two bits for storing the level of privilege.

18. The device of claim 15 , wherein the second sub-cache includes a privilege merge table, the privilege merge table indicating how different levels of privilege are merged.

19. The device of claim 18 , wherein the privilege merge table is predefined.

20. The device of claim 15 , wherein merging the first level of privilege with the second level of privilege comprises selecting a lower of the first level of privilege and the second level of privilege.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2020
From: BHORIA, NAVEEN; ANDERSON, TIMOTHY DAVID; HIPPLEHEUSER, PETE
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 052770/0499 →
Continuity (2)
Provisional Application 62852494 · May 24, 2019
Related Publication 20200371928A1 · Nov 26, 2020