IP Library Granted Patent US 11,456,314
Granted Patent B2
US 11,456,314 · App. 16/882,829 · Granted Sep 27, 2022

Semiconductor device including transparent conductive oxide layer

Inventors: Changsoo Lee (Seoul, KR); Jongmyeong Lee (Hanam-si, KR); Iksoo Kim (Yongin-si, KR); Jiwoon Im (Hwaseong-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L27/11582G11C7/18H01L27/1157H01L27/11565H01L27/11573H01L29/7926
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,456,314
App. No.
16/882,829
Granted
Sep 27, 2022
Kind
B2
Abstract

A semiconductor device may comprise a stack structure on a substrate, the stack structure including a plurality of dielectric layers and a plurality of transparent conductive oxide layers, the dielectric layers and the transparent conductive oxide layers are alternately stacked, each of the dielectric layers and a corresponding one of the transparent conductive oxide layer adjacent to each other in a vertical direction have equal horizontal widths, and a channel structure extending through the stack structure, the channel structure including an information storage layer, a channel layer inside the information storage layer, and a buried dielectric layer inside the channel layer.

Claims (42)

1. A semiconductor device comprising:

a stack structure on a substrate, the stack structure including a plurality of dielectric layers and a plurality of transparent conductive oxide layers, the dielectric layers and the transparent conductive oxide layers are alternately stacked, each of the dielectric layers and a corresponding one of the transparent conductive oxide layers adjacent to each other in a vertical direction have equal horizontal widths; and

a channel structure extending through the stack structure, the channel structure including

an information storage layer,

a channel layer inside the information storage layer, and

a buried dielectric layer inside the channel layer,

wherein each of the transparent conductive oxide layers is an n-type electrode.

2. The semiconductor device according to claim 1 , wherein each of the transparent conductive oxide layers includes one selected from among ZnO, SnO 2 , TiO 2 , CuAlO 2 , CuGaO 2 , CuInO 2 , and SrCu 2 O 2 .

3. The semiconductor device according to claim 1 , wherein each of the transparent conductive oxide layers has a carrier concentration of 10 17 /cm 3 to 10 22 /cm 3 .

4. The semiconductor device according to claim 1 , wherein, in each of the dielectric layers and the corresponding transparent conductive oxide layer that are stacked adjacent to each other in the vertical direction, a central portion and an edge of the dielectric layer abut the corresponding transparent conductive oxide layer.

5. The semiconductor device according to claim 1 , wherein a horizontal distance between the dielectric layers that are adjacent to each other in a horizontal direction is equal to a horizontal distance between the transparent conductive oxide layers that are adjacent to each other in the horizontal direction.

6. The semiconductor device according to claim 1 , further comprising:

a lower semiconductor layer protruding vertically from an upper surface of the substrate, the lower semiconductor layer abutting a lower surface of the channel layer.

7. The semiconductor device according to claim 6 , wherein an upper surface of the lower semiconductor layer is located at a lower level than a lower surface of a lowermost one of the transparent conductive oxide layers.

8. The semiconductor device according to claim 6 , wherein an upper surface of the lower semiconductor layer is located at a higher level than an upper surface of a lowermost one of the transparent conductive oxide layers.

9. The semiconductor device according to claim 6 , wherein a lower surface of the information storage layer is located at a lower level than the upper surface of the substrate.

10. A semiconductor device comprising:

a peripheral circuit structure including a peripheral circuit device and a contact plug;

a lower conductive layer on the peripheral circuit structure;

a stack structure on the lower conductive layer, the stack structure including a plurality of dielectric layers and a plurality of transparent conductive oxide layers, the dielectric layers and the transparent conductive oxide layers are alternately stacked; and

a plurality of channel structures extending through the stack structure, each channel structure including an information storage layer, a channel layer inside the information storage layer, the channel layer being connected to the lower conductive layer, and a buried dielectric layer inside the channel layer,

wherein each of the transparent conductive oxide layers is an n-type electrode.

11. The semiconductor device according to claim 10 , wherein each of the transparent conductive oxide layers includes one selected from among ZnO, SnO 2 , TiO 2 , CuAlO 2 , CuGaO 2 , CuInO 2 , and SrCu 2 O 2 .

12. The semiconductor device according to claim 10 , wherein the lower conductive layer includes an identical material to each of the transparent conductive oxide layers.

13. The semiconductor device according to claim 10 , wherein the channel layer extends through a lower surface of the information storage layer.

14. The semiconductor device according to claim 10 , wherein the channel layer fills a recess in an upper surface of the lower conductive layer.

15. The semiconductor device according to claim 10 , wherein a lower surface of the information storage layer is at a lower level than an upper surface of the lower conductive layer.

16. The semiconductor device according to claim 10 , wherein, in a longitudinal sectional view, horizontal widths of each of the dielectric layers and a corresponding one of the transparent conductive oxide layers that are stacked adjacent to each other in a vertical direction are equal to each other.

17. A semiconductor device comprising:

a peripheral circuit structure including a peripheral circuit device and a contact plug;

a lower conductive layer on the peripheral circuit structure;

a stack structure on the lower conductive layer, the stack structure including a plurality of dielectric layers and a plurality of transparent conductive oxide layers, the dielectric layers and the transparent conductive oxide layers are alternately stacked;

a plurality of channel structures extending through the stack structure, each channel structure including an information storage layer, a channel layer inside the information storage layer, the channel layer being connected to the lower conductive layer, and a buried dielectric layer inside the channel layer;

a plurality of conductive pads in the stack structure and on respective channel structures;

a selection line separation layer extending into the stack structure separating at least one of the transparent conductive oxide layers;

a buried layer adjacent to the channel structures, the buried layer extending through the stack structure; and

a bit line on the stack structure, the bit line being electrically connected to the conductive pads, wherein

when viewed in a longitudinal sectional view, horizontal widths of each of the dielectric layers and a corresponding one of the transparent conductive oxide layers that are stacked adjacent to each other in a vertical direction are substantially equal to each other,

in each of the dielectric layers and the corresponding one of the transparent conductive oxide layers that are stacked adjacent to each other in the vertical direction, a central portion and an edge of the dielectric layer abut the transparent conductive oxide layer, and

a horizontal distance between dielectric layers that are adjacent to each other in a horizontal direction, among the dielectric layers, is substantially equal to a horizontal distance between transparent conductive oxide layers that are adjacent to each other in the horizontal direction, among the transparent conductive oxide layers, and

wherein each of the transparent conductive oxide layers is an n-type electrode.

18. The semiconductor device according to claim 17 , wherein the lower conductive layer includes an identical material to each of the transparent conductive oxide layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2020
From: LEE, CHANGSOO; LEE, JONGMYEONG; KIM, IKSOO; IM, JIWOON
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 052748/0913 →
Priority Claims (1)
KR 10-2019-0123150 · Oct 4, 2019 · national
Continuity (1)
Related Publication 20210104538A1 · Apr 8, 2021