IP Library Granted Patent US 11,151,071
Granted Patent B1
US 11,151,071 · App. 16/884,148 · Granted Oct 19, 2021

Host device with multi-path layer distribution of input-output operations across storage caches

Inventors: Rimpesh Patel (Bangalore, IN); Amit Pundalik Anchi (Bangalore, IN)
Assignee: EMC IP Holding Company LLC
G06F13/4022G06F12/10
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Quick Facts
Patent No.
US 11,151,071
App. No.
16/884,148
Granted
Oct 19, 2021
Kind
B1
Abstract

An apparatus comprises a host device configured to communicate over a network with a storage system. The host device comprises a multi-path input-output (MPIO) driver configured to control delivery of input-output (TO) operations to the storage system over selected ones of a plurality of paths through the network. The MPIO driver is further configured to determine mappings between ranges of logical block addresses (LBAs) of logical storage volumes and respective ones of a plurality of cache entities of the storage system, to select, for a first IO operation comprising a first set of LBAs of a first logical storage volume, a first one of the paths associated with a first one of the cache entities, and to select, for a second IO operation comprising the first set of LBAs of a second logical storage volume, a second one of the paths associated with a second one of the cache entities.

Claims (50)

1. An apparatus comprising:

a host device configured to communicate over a network with a storage system comprising a plurality of storage devices;

the host device comprising a multi-path input-output driver configured to control delivery of input-output operations to the storage system over selected ones of a plurality of paths through the network;

wherein the multi-path input-output driver is further configured:

to determine mappings between ranges of logical block addresses of two or more logical storage volumes and respective ones of a plurality of cache entities of the storage system, wherein the plurality of cache entities comprise respective components of the storage system that have respective local caches associated therewith, and wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises determining a sequence of identifiers of the plurality of cache entities and assigning ranges of logical block addresses of the two or more storage volumes to respective ones of the plurality of cache entities based at least in part on the sequence of identifiers;

to select, for a first input-output operation comprising a first set of logical block addresses of a first one of the two or more logical storage volumes, a first one of the plurality of paths associated with a first one of the plurality of cache entities of the storage system based at least in part on a first starting index in the sequence of identifiers associated with the first logical storage volume and a first element index in the sequence of identifiers associated with the first set of logical block addresses of the first logical storage volume; and

to select, for a second input-output operation comprising a second set of logical block addresses of a second one of the two or more logical storage volumes, a second one of the plurality of paths associated with a second one of the plurality of cache entities of the storage system based at least in part on a second starting index in the sequence of identifiers associated with the second logical storage volume and a second element index in the sequence of identifiers associated with the second set of logical block addresses of the second logical storage volume, the second starting index being different than the first starting index and the second element index being different than the first element index.

2. The apparatus of claim 1 further comprising one or more additional host devices each configured to communicate over the network with the storage system and wherein each additional host device comprises a multi-path input-output driver configured to control delivery of input-output operations from that host device to the storage system over selected ones of a plurality of paths through the network.

3. The apparatus of claim 1 wherein the plurality of cache entities of the storage system comprise respective storage controllers of the storage system with each such storage controller having a different local cache associated therewith.

4. The apparatus of claim 1 wherein the multi-path input-output driver is further configured to select, for a third input-output operation comprising a second third set of logical block addresses of the first logical storage volume, an additional one of the plurality of paths associated with an additional one of the plurality of cache entities different than the first cache entity of the storage system.

5. The apparatus of claim 4 wherein the additional cache entity comprises the second cache entity.

6. The apparatus of claim 4 wherein the second third set of logical block addresses of the first logical storage volume comprises a second set of logical block address offsets adjacent to a first set of logical block address offsets of the first set of logical block addresses of the first logical storage volume.

7. The apparatus of claim 1 wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises determining, from the sequence of identifiers of the plurality of cache entities, starting indexes for each of the two or more logical storage volumes.

8. The apparatus of claim 7 wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises determining, from the sequence of identifiers of the plurality of cache entities, element indexes for different logical block address offsets for a given one of the two or more logical storage volumes based at least in part on a given one of the starting indexes for the given logical storage volume.

9. The apparatus of claim 1 wherein determining the sequence of identifiers of the plurality of cache entities comprises:

generating an alpha-numeric sorted string of the identifiers of the plurality of cache entities;

determining a plurality of permutations of the alpha-numeric sorted string of the identifiers of the plurality of cache entities;

generating a sorted substring of the plurality of permutations of the alpha-numeric sorted string of the identifiers of the plurality of cache entities; and

generating a horizontally different substring from the sorted substring, the horizontally different substring comprising an ordering of the plurality of permutations of the alpha-numeric sorted strings of the identifiers of the plurality of cache entities that avoids consecutive entries having the same cache entity identifier.

10. The apparatus of claim 1 wherein selecting the first path comprises:

identifying a given volume number of the first logical storage volume and a given logical block address offset number of the first set of logical block addresses of the first logical storage volume;

determining the first starting index in the sequence of identifiers of the plurality of cache entities for the first logical storage volume based at least in part on the given volume number of the first logical storage volume; and

determining the first element index in the sequence of identifiers of the plurality of cache entities for the first set of logical block addresses of the first logical storage volume based at least in part on the first starting index and the given logical block address offset number, wherein the first cache entity is associated with an identifier of the first element index.

11. The apparatus of claim 10 wherein determining the first starting index in the sequence of identifiers of the plurality of cache entities for the first logical storage volume comprises calculating X modulo (p*n), where X denotes the given volume number of the first logical storage volume, p denotes a total number of the plurality of permutations, and n denotes a total number of the plurality of cache entities.

12. The apparatus of claim 10 wherein determining the first element index in the sequence of identifiers of the plurality of cache entities for the first logical storage volume comprises calculating E modulo (p*n), where E denotes a sum of the given volume number of the first logical storage volume and the given logical block address offset number of the first set of logical block addresses, p denotes a total number of the plurality of permutations, and n denotes a total number of the plurality of cache entities.

13. A method comprising:

executing in a host device one or more processes that generate input-output operations for delivery over a network to a storage system comprising a plurality of storage devices;

implementing a multi-path input-output driver in the host device, the multi-path input-output driver controlling delivery of the input-output operations from the host device to the storage system over selected ones of a plurality of paths through the network; and

configuring the multi-path input-output driver to perform steps of:

determining mappings between ranges of logical block addresses of two or more logical storage volumes and respective ones of a plurality of cache entities of the storage system, wherein the plurality of cache entities comprise respective components of the storage system that have respective local caches associated therewith, and wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises determining a sequence of identifiers of the plurality of cache entities and assigning ranges of logical block addresses of the two or more storage volumes to respective ones of the plurality of cache entities based at least in part on the sequence of identifiers;

selecting, for a first input-output operation comprising a first set of logical block addresses of a first one of the two or more logical storage volumes, a first one of the plurality of paths associated with a first one of the plurality of cache entities of the storage system based at least in part on a first starting index in the sequence of identifiers associated with the first logical storage volume and a first element index in the sequence of identifiers associated with the first set of logical block addresses of the first logical storage volume; and

selecting, for a second input-output operation comprising a second set of logical block addresses of a second one of the two or more logical storage volumes, a second one of the plurality of paths associated with a second one of the plurality of cache entities of the storage system based at least in part on a second starting index in the sequence of identifiers associated with the second logical storage volume and a second element index in the sequence of identifiers associated with the second set of logical block addresses of the second logical storage volume, the second starting index being different than the first starting index and the second element index being different than the first element index.

14. The method of claim 13 further comprising configuring the multi-path input-output driver to perform the step of selecting, for a third input-output operation comprising a third set of logical block addresses of the first logical storage volume, an additional one of the plurality of paths associated with an additional one of the plurality of cache entities different than the first cache entity of the storage system.

15. The method of claim 13 wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises:

determining, from the sequence of identifiers of the plurality of cache entities, starting indexes for each of the two or more logical storage volumes.

16. A computer program product comprising a non-transitory processor-readable storage medium having stored therein program code of one or more software programs, wherein the program code, when executed by a host device configured to communicate over a network with a storage system comprising a plurality of storage devices, causes the host device:

to execute one or more processes that generate input-output operations for delivery over the network to the storage system;

to implement a multi-path input-output driver in the host device, the multi-path input-output driver controlling delivery of the input-output operations from the host device to the storage system over selected ones of a plurality of paths through the network; and

to configure the multi-path input-output driver to perform steps of:

determining mappings between ranges of logical block addresses of two or more logical storage volumes and respective ones of a plurality of cache entities of the storage system, wherein the plurality of cache entities comprise respective components of the storage system that have respective local caches associated therewith, and wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises determining a sequence of identifiers of the plurality of cache entities and assigning ranges of logical block addresses of the two or more storage volumes to respective ones of the plurality of cache entities based at least in part on the sequence of identifiers;

selecting, for a first input-output operation comprising a first set of logical block addresses of a first one of the two or more logical storage volumes, a first one of the plurality of paths associated with a first one of the plurality of cache entities of the storage system based at least in part on a first starting index in the sequence of identifiers associated with the first logical storage volume and a first element index in the sequence of identifiers associated with the first set of logical block addresses of the first logical storage volume; and

selecting, for a second input-output operation comprising a second set of logical block addresses of a second one of the two or more logical storage volumes, a second one of the plurality of paths associated with a second one of the plurality of cache entities of the storage system based at least in part on a second starting index in the sequence of identifiers associated with the second logical storage volume and a second element index in the sequence of identifiers associated with the second set of logical block addresses of the second logical storage volume, the second starting index being different than the first starting index and the second element index being different than the first element index.

17. The computer program product of claim 16 wherein the program code when executed further configures the multi-path input-output driver to perform the step of selecting, for a third input-output operation comprising a second third set of logical block addresses of the first logical storage volume, an additional one of the plurality of paths associated with an additional one of the plurality of cache entities different than the first cache entity of the storage system.

18. The computer program product of claim 16 wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises:

determining, from the sequence of identifiers of the plurality of cache entities, starting indexes for each of the two or more logical storage volumes.

19. The computer program product of claim 18 wherein determining the mappings between the ranges of logical block addresses of the two or more logical storage volumes and respective ones of the plurality of cache entities of the storage system comprises determining, from the sequence of identifiers of the plurality of cache entities, element indexes for different logical block address offsets for a given one of the two or more logical storage volumes based at least in part on the starting index for the given logical storage volume.

20. The computer program product of claim 16 wherein selecting the first path comprises:

identifying a given volume number of the first logical storage volume and a given logical block address offset number of the first set of logical block addresses of the first logical storage volume;

determining the first starting index in the sequence of identifiers of the plurality of cache entities for the first logical storage volume based at least in part on the given volume number of the first logical storage volume; and

determining the first element index in the sequence of identifiers of the plurality of cache entities for the first set of logical block addresses of the first logical storage volume based at least in part on the first starting index and the given logical block address offset number, wherein the first cache entity is associated with an identifier of the first element index.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053574/0221) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053578/0183) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060332/0864 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053573/0535) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0106 →
RELEASE OF SECURITY INTEREST AT REEL 053531 FRAME 0108 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0371 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053578/0183 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053573/0535 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053574/0221 →
SECURITY AGREEMENT Recorded Aug 18, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 053531/0108 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PATEL, RIMPESH; ANCHI, AMIT PUNDALIK
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 052757/0293 →
Cited By (2)
US 12,405,738 US 12,602,344