IP Library › Granted Patent US 11,038,504
Granted Patent B2
US 11,038,504 · App. 16/897,541 · Granted Jun 15, 2021

Generating high dynamic voltage boost

Inventors: Chan-Hong Chern (Palo Alto, CA); Tysh-Bin Liu (Hsinchu County, TW); Kun-Lung Chen (Hsinchu County, TW)
Assignee: Taiwan Semiconductor Manufacturing Company Limited
H03K17/6871H02M3/07H03K17/063H03K2217/0081
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Quick Facts
Patent No.
US 11,038,504
App. No.
16/897,541
Granted
Jun 15, 2021
Kind
B2
Abstract

Devices, systems, and methods are provided for generating a high, dynamic voltage boost. An integrated circuit (IC) includes a driving circuit having a first stage and a second stage. The driving circuit is configured to provide an overdrive voltage. The IC also includes a charge pump circuit coupled between the first stage and the second stage. The charge pump circuit is configured generate a dynamic voltage greater than the overdrive voltage. The IC also includes a bootstrap circuit coupled to the charge pump circuit, configured to further dynamically boost the overdrive voltage of the driving circuit.

Claims (38)

1. An integrated circuit comprising:

a driving circuit having a first stage and a second stage, the driving circuit configured to provide an overdrive voltage, wherein the first stage comprises a depletion-mode high electron mobility transistor (D-HEMT) and the first stage and the second stage have a shared voltage input;

a charge pump circuit coupled between the D-HEMT and the second stage, wherein the charge pump circuit is configured to generate a dynamic voltage greater than the overdrive voltage; and

a bootstrap circuit coupled to the charge pump circuit, wherein the bootstrap circuit is configured to increase the overdrive voltage of the driving circuit.

2. The integrated circuit of claim 1 , further comprising a power transistor coupled to the driving circuit, wherein the overdrive voltage drives the power transistor.

3. The integrated circuit of claim 1 , wherein the bootstrap circuit comprises:

a bootstrap diode having a cathode terminal coupled to the second stage; and

a bootstrap capacitor coupled between the cathode terminal and a output pin of the driving circuit.

4. The integrated circuit of claim 1 , wherein the first stage further comprises a first enhanced-mode high electron mobility transistor (E-HEMT) and the second stage comprises a second and third enhanced-mode high electron mobility transistor (E-HEMT), wherein a gate terminal of the D-HEMT is coupled to a source/drain terminal of the first E-HEMT and a source/drain terminal of the D-HEMT is coupled to the charge pump circuit.

5. The integrated circuit of claim 4 , wherein the first E-HEMT and the second E-HEMT are in an off-state at a zero gate-source voltage and wherein the D-HEMT is operational when a voltage of zero is applied to a gate of the D-HEMT and non-operational when a negative voltage is applied to the gate.

6. The integrated circuit of claim 1 , wherein the driving circuit further comprises a third stage having a pair of enhanced-mode high electron mobility transistors (E-HEMT).

7. The integrated circuit of claim 3 , wherein the driving circuit further comprises a fourth stage having a first enhanced-mode high electron mobility transistor (E-HEMT), a second E-HEMT, and a third E-HEMT, the first E-HEMT having a first source/drain terminal and a gate terminal coupled to the cathode terminal of the bootstrap diode.

8. The integrated circuit of claim 1 , further comprising an internal bootstrap circuit having a diode coupled between the charge pump circuit and the first stage and a capacitor coupled between the diode and a reference voltage pin.

9. The integrated circuit of claim 1 , further comprising a boot-strapped inverting buffer circuit configured to reduce an input load of the first stage.

10. A method comprising:

receiving, by a charge pump circuit of an integrated circuit, an input voltage;

generating, by the charge pump circuit, a dynamic charge pump voltage configured to drive a first voltage stage and a second voltage stage of the integrated circuit, wherein the first voltage stage comprises a depletion-mode high electron mobility transistor (D-HEMT), and the charge pump circuit is coupled between the D-HEMT and the second voltage stage;

providing, by charge pump circuit, the dynamic charge pump voltage to a bootstrap circuit, wherein the bootstrap circuit is coupled to the charge pump circuit;

generating, by the bootstrap circuit, a boosted voltage based on the dynamic charge pump voltage to the first stage;

receiving, by the first voltage stage and the second voltage stage, a shared voltage input; and

generating, by the second voltage stage, an overdrive voltage based on the boosted voltage to drive a power transistor.

11. The method of claim 10 , wherein the overdrive voltage exceeds a minimum voltage threshold of the power transistor.

12. The method of claim 10 , further comprising:

minimizing a static current of the first stage and the second stage; and

modifying, by the bootstrap circuit, an impedance of the first stage to minimize the static current.

13. A system comprising:

a high-side driver having a plurality of staged high electron mobility transistors (HEMTs), the high-side driver configured to provide an overdrive voltage;

a charge pump circuit coupled between a first portion of the plurality of staged HEMTs and a second portion of the plurality of staged HEMTs, the first portion comprising a depletion-mode HEMT (D-HEMT), the charge pump is configured to generate a dynamic charge-pump voltage greater than the overdrive voltage, wherein the first portion and the second portion have a shared voltage input; and

a power transistor coupled between the high-side driver and one or more electrical components, wherein the power transistor is configured to provide a voltage based on the overdrive voltage to the one or more electronic components.

14. The system of claim 13 , further comprising a bootstrap circuit coupled between an output pin and the charge pump circuit configured to increase the overdrive voltage of the high-side driver.

15. The system of claim 14 , wherein the bootstrap circuit comprises:

a bootstrap diode having a cathode terminal coupled to one of the plurality of staged HEMTs; and

a bootstrap capacitor coupled between the cathode terminal and the output pin of the high-side driver.

16. The system of claim 13 , wherein one of the plurality of staged HEMTs comprises a first enhanced-mode high electron mobility transistor (E-HEMT), and another of the plurality of the staged HEMTs comprises a second and third enhanced-mode high electron mobility transistor (E-HEMT), wherein a gate terminal of the D-HEMT is coupled to a source/drain terminal of the first E-HEMT and a source/drain terminal of the D-HEMT is coupled to the charge pump circuit.

17. The system of claim 16 , wherein the first E-HEMT and the second E-HEMT are in an off-state at a zero gate-source voltage and wherein the D-HEMT is operational when a voltage of zero is applied to a gate of the D-HEMT and non-operational when a negative voltage is applied to the gate.

18. The integrated circuit of claim 13 , wherein the plurality of staged HEMTS includes a pair of enhanced-mode high electron mobility transistors (E-HEMT).

19. The system of claim 16 , wherein the plurality of staged HEMTs further comprises a fourth stage having a first enhanced-mode high electron mobility transistor (E-HEMT), a second E-HEMT, and a third E-HEMT, the first E-HEMT having a first source/drain terminal and a gate terminal coupled to the cathode terminal of the bootstrap diode.

20. The system of claim 13 , further comprising an internal bootstrap circuit having a diode coupled between the charge pump circuit and one of the plurality of HEMTs and a capacitor coupled between the diode and a reference voltage pin.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2020
From: CHERN, CHAN-HONG; CHEN, KUN-LUNG; LIU, TYSH-BIN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Reel/Frame 052892/0916 →
Continuity (3)
Continuation 16165047 · Oct 19, 2018
Provisional Application 62575565 · Oct 23, 2017
Related Publication 20200304119A1 · Sep 24, 2020
Cited By (1)
US 12,574,029