IP Library › Granted Patent US 11,222,887
Granted Patent B2
US 11,222,887 · App. 16/910,094 · Granted Jan 11, 2022

Transient voltage suppression device

Inventors: Cheng-Chi Lin (Hsinchu County, TW); Chih-Hao Chen (Hsinchu County, TW)
Assignee: IPU SEMICONDUCTOR CO., LTD.
H01L27/0262H01L29/7408
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Quick Facts
Patent No.
US 11,222,887
App. No.
16/910,094
Granted
Jan 11, 2022
Kind
B2
Abstract

A transient voltage suppression device including a substrate of a first conductivity type, a first well of a second conductivity type, a first anode, a first cathode, and a first trigger node is provided. The first well is disposed in the substrate. The first anode is disposed in the substrate outside the first well and includes a second doped region of the second conductivity type and a third doped region of the first conductivity type disposed between the second doped region and the first doped region. The first trigger node is disposed between the first anode and the first cathode, and includes a fourth region of the first conductivity type disposed in the substrate and a fifth doped region of the second conductivity type at least partially disposed in the first well and disposed between the fourth doped region and the third doped region.

Claims (24)

1. A transient voltage suppression device, comprising:

a substrate of a first conductivity type;

a first well of a second conductivity type, disposed in the substrate;

a first anode, disposed in the substrate outside the first well and comprising a first doped region of the second conductivity type;

a first cathode, disposed in the first well and comprising:

a second doped region of the second conductivity type; and

a third doped region of the first conductivity type, disposed between the second doped region and the first doped region; and

a first trigger node, disposed between the first anode and the first cathode, and comprising:

a fourth doped region of the first conductivity type, disposed in the substrate; and

a fifth doped region of the second conductivity type, at least partially disposed in the first well and disposed between the fourth doped region and the third doped region.

2. The transient voltage suppression device according to claim 1 , wherein the first trigger node is electrically floating.

3. The transient voltage suppression device according to claim 1 , wherein the fourth doped region and the fifth doped region are in a same diffusion region and are adjacent to a surface of the substrate.

4. The transient voltage suppression device according to claim 1 , wherein a doping concentration of the fourth doped region is greater than or equal to a doping concentration of the fifth doped region.

5. The transient voltage suppression device according to claim 1 , wherein a portion of the fourth doped region is disposed in the fifth doped region.

6. The transient voltage suppression device according to claim 1 , wherein the first cathode further comprises a sixth doped region of the first conductivity type, and the second doped region is disposed between the sixth doped region and the third doped region.

7. The transient voltage suppression device according to claim 1 , wherein the first cathode further comprises a seventh doped region of the second conductivity type, and the seventh doped region is disposed below the second doped region and the third doped region.

8. The transient voltage suppression device according to claim 7 , wherein a doping concentration of the seventh doped region is between a doping concentration of the first well and a doping concentration of the second doped region.

9. The transient voltage suppression device according to claim 7 , wherein the seventh doped region and the fifth doped region are in contact.

10. The transient voltage suppression device according to claim 7 , wherein the seventh doped region and the fifth doped region are separated by a distance.

11. The transient voltage suppression device according to claim 1 , wherein the first trigger node further comprises a second well of the first conductivity type, disposed in the substrate below the fourth doped region.

12. The transient voltage suppression device according to claim 11 , wherein the second well and the first well are in contact.

13. The transient voltage suppression device according to claim 11 , wherein the second well and the first well are separated by a distance.

14. The transient voltage suppression device according to claim 1 , wherein the second doped region and the third doped region are in contact and are at a same potential.

15. The transient voltage suppression device according to claim 1 , wherein the transient voltage suppression device is a mirror structure with the first doped region or the second doped region as a central axis.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2021
From: UPI SEMICONDUCTOR CORP.
To: IPU SEMICONDUCTOR CO., LTD.
Reel/Frame 054805/0609 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2020
From: LIN, CHENG-CHI; CHEN, CHIH-HAO
To: UPI SEMICONDUCTOR CORP.
Reel/Frame 053065/0623 →
Priority Claims (1)
TW 108125073 · Jul 16, 2019 · national
Continuity (1)
Related Publication 20210020625A1 · Jan 21, 2021