IP Library › Granted Patent US 11,935,956
Granted Patent B2
US 11,935,956 · App. 16/913,835 · Granted Mar 19, 2024

TMD inverted nanowire integration

Inventors: Kevin P. O'Brien (Portland, OR); Carl Naylor (Portland, OR); Chelsey Dorow (Portland, OR); Kirby Maxey (Hillsboro, OR); Tanay Gosavi (Portland, OR); Ashish Verma Penumatcha (Beaverton, OR); Shriram Shivaraman (Hillsboro, OR); Chia-Ching Lin (Portland, OR); Sudarat Lee (Hillsboro, OR); Uygar E. Avci (Portland, OR)
Assignee: Intel Corporation
H01L29/7853H01L29/0673H01L29/24H01L29/42392H01L29/6653H01L29/6681H01L21/02568H01L21/0262
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Quick Facts
Patent No.
US 11,935,956
App. No.
16/913,835
Granted
Mar 19, 2024
Kind
B2
Abstract

Embodiments disclosed herein comprise semiconductor devices with two dimensional (2D) semiconductor channels and methods of forming such devices. In an embodiment, the semiconductor device comprises a source contact and a drain contact. In an embodiment, a 2D semiconductor channel is between the source contact and the drain contact. In an embodiment, the 2D semiconductor channel is a shell.

Claims (38)

1. A semiconductor device, comprising:

a source contact;

a drain contact laterally spaced apart from the source contact; and

a two dimensional (2D) semiconductor channel laterally between the source contact and the drain contact, wherein the 2D semiconductor channel is a shell.

2. The semiconductor device of claim 1 , wherein an interior of the shell is filled with air.

3. The semiconductor device of claim 1 , wherein an interior of the shell is filled with a dielectric material.

4. The semiconductor device of claim 1 , further comprising:

a gate dielectric over an exterior surface of the shell.

5. The semiconductor device of claim 4 , further comprising:

a gate electrode over the gate dielectric.

6. The semiconductor device of claim 1 , wherein the 2D semiconductor channel comprises a transition metal dichalcogenide (TMD).

7. The semiconductor device of claim 6 , wherein the TMD comprises molybdenum and sulfur, tungsten and sulfur, molybdenum and selenium, tungsten and selenium, molybdenum and tellurium, or tungsten and tellurium.

8. The semiconductor device of claim 1 , wherein the shell has a rectangular cross-section.

9. The semiconductor device of claim 1 , further comprising:

a spacer, wherein the shell passes through the spacer.

10. A method of forming a semiconductor device, comprising:

forming a stack of sacrificial channels between a sacrificial source contact and a sacrificial drain contact, wherein the sacrificial channels are surrounded by a gate stack;

removing the sacrificial source contact to expose a first end of the sacrificial channels;

removing the sacrificial channels to form voids in the gate stack;

replacing the sacrificial drain contact with a seed material;

growing two dimensional (2D) semiconductors from the seed material into the voids, wherein the 2D semiconductors form shells lining the voids;

removing the seed material; and

disposing a replacement source contact and a replacement drain contact at opposite ends of the shells.

11. The method of claim 10 , wherein the gate stack comprises a gate dielectric and a gate electrode.

12. The method of claim 11 , wherein an exterior surface of the shells are in direct contact with the gate dielectric.

13. The method of claim 10 , further comprising:

filling interiors of the shells with a dielectric material.

14. The method of claim 10 , wherein the 2D semiconductors are a transition metal dichalcogenide (TMD).

15. The method of claim 14 , wherein the TMD comprises molybdenum and sulfur, tungsten and sulfur, molybdenum and selenium, tungsten and selenium, molybdenum and tellurium, or tungsten and tellurium.

16. The method of claim 10 , wherein the seed material comprises molybdenum and oxygen or tungsten and oxygen.

17. The method of claim 10 , wherein the 2D semiconductors are grown with a high temperature exposure in a gas comprising selenium, or hydrogen and selenium.

18. An electronic system, comprising:

a board;

an electronic package coupled to the board; and

a die coupled to the electronic package, wherein the die comprises:

a transistor, wherein a channel of the transistor comprises a shell of two dimensional (2D) semiconductor material laterally between a source contact and a drain contact, the drain contact laterally spaced apart from the source contact.

19. The electronic system of claim 18 , wherein a gate dielectric and a gate electrode surround an exterior surface of the shell.

20. The electronic system of claim 18 , wherein the 2D semiconductor material is a transition metal dichalcogenide (TMD) comprising molybdenum and sulfur, tungsten and sulfur, molybdenum and selenium, tungsten and selenium, molybdenum and tellurium, or tungsten and tellurium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2020
From: O'BRIEN, KEVIN P.; NAYLOR, CARL; DOROW, CHELSEY; MAXEY, KIRBY; GOSAVI, TANAY; PENUMATCHA, ASHISH VERMA; SHIVARAMAN, SHRIRAM; LIN, CHIA-CHING; LEE, SUDARAT; AVCI, UYGAR E.
To: INTEL CORPORATION
Reel/Frame 054250/0886 →
Continuity (1)
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