IP Library › Granted Patent US 11,424,328
Granted Patent B2
US 11,424,328 · App. 16/914,477 · Granted Aug 23, 2022

GaN/diamond wafers

Inventor: Won Sang Lee (Chapel Hill, NC)
Assignee: RFHIC Corporation
H01L29/2003H01L21/0254H01L21/02378H01L21/02488H01L21/02527H01L21/76871H01L21/76897H01L24/94H01L29/1602H01L29/205H01L29/267H01L29/66462
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Quick Facts
Patent No.
US 11,424,328
App. No.
16/914,477
Granted
Aug 23, 2022
Kind
B2
Abstract

A method for fabricating a semiconductor wafer is provided, where the semiconductor wafer includes a diamond layer and a semiconductor layer having III-Nitride compounds. The method includes the steps of: disposing a nucleation layer on a SiC substrate and disposing at least one semiconductor layer on the nucleation layer, the at least one semiconductor layer including a III-Nitride compound. The method further includes the steps of: disposing a protection layer on the at least one semiconductor layer; bonding a carrier wafer to the protection layer, the carrier wafer including a SiC substrate; removing the substrate, the nucleation layer and a portion of the at least one semiconductor layer; disposing a diamond layer on the at least one semiconductor layer; depositing a substrate wafer on the diamond layer; and removing the carrier wafer and the protection layer.

Claims (35)

1. A method for fabricating a semiconductor wafer, comprising:

disposing a nucleation layer on a first substrate;

disposing at least one semiconductor layer on the nucleation layer, the at least one semiconductor layer including a III-Nitride compound;

disposing a protection layer on the at least one semiconductor layer;

bonding a carrier wafer to the protection layer, the carrier wafer including an SiC substrate;

removing the first substrate, the nucleation layer and a portion of the at least one semiconductor layer;

disposing a diamond layer on the at least one semiconductor layer;

depositing a support wafer on the diamond layer; and

removing the carrier wafer and the protection layer.

2. The method of claim 1 , wherein the at least one semiconductor layer includes a GaN layer that is directly disposed on the nucleation layer and wherein the removed portion of the at least one semiconductor layer is a portion of the GaN layer near an interface between the nucleation layer and the GaN layer.

3. The method of claim 2 , wherein the step of disposing at least one semiconductor layer includes:

disposing the GaN layer on the nucleation layer; and

disposing at least one of AlGaN layer and an InAlN layer on the GaN layer.

4. The method of claim 1 , further comprising, after the step of removing the carrier wafer and the protection layer:

disposing an additional semiconductor layer on the at least one semiconductor layer, the additional semiconductor layer including a III-Nitride compound.

5. The method of claim 1 , wherein the protection layer is formed of a material that includes one or more of SiN, poly-Si, Al 2 O 3 , AlN and GaN.

6. The method of claim 1 , wherein the step of disposing a diamond layer on the at least one semiconductor layer includes:

disposing an intermediate layer on the at least one semiconductor layer, the intermediate layer including a first layer that is formed of a material including one or more of poly-Si, SiO 2 , Al 2 O 3 , and SiN and a second layer including diamond particles; and

disposing the diamond layer on the intermediate layer.

7. The method of claim 1 , further comprising, after the step of disposing a diamond layer:

lapping a surface of the diamond layer to enhance a flatness of the surface of the diamond layer.

8. The method of claim 1 , wherein the support wafer further includes a poly-silicon layer covered by a protection layer that is formed of a material including one or more of Ti/Au, Cr/Au, SiN, Al 2 O 3 , and AlN.

9. The method of claim 1 , wherein the support wafer includes a poly-GaN layer.

10. The method of claim 1 , further comprising:

forming one or more semiconductor devices in the at least one semiconductor layer.

11. The method of claim 1 , wherein the first substrate is formed of SiC.

12. The method of claim 1 , further comprising, prior to the step of bonding a carrier wafer to the protection layer:

forming one or more thru-holes in the SiC substrate of the carrier wafer; and

forming one or more patterns on a surface of the SiC substrate,

wherein the one or more thru-holes are in fluid communication with the one or more patterns, and the step of removing the carrier wafer and the protection layer includes introducing etching solution into the thru-holes.

13. The method of claim 1 , further comprising, prior to the step of bonding a carrier wafer to the protection layer:

forming a protection layer and a chemical etching layer on the SiC substrate of the carrier wafer,

wherein the step of removing the carrier wafer and the protection layer includes etching the chemical etching layer.

14. The method of claim 1 , wherein the step of bonding a carrier wafer to the protection layer includes glass bonding the carrier wafer to the protection layer.

15. The method of claim 1 , wherein the one or more semiconductor devices include one or more high electron mobile transistors (HEMTs).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2020
From: LEE, WON SANG
To: RFHIC CORPORATION
Reel/Frame 053568/0949 →
Continuity (2)
Provisional Application 62971869 · Feb 7, 2020
Related Publication 20210249258A1 · Aug 12, 2021