IP Library Granted Patent US 11,595,213
Granted Patent B2
US 11,595,213 · App. 16/914,714 · Granted Feb 28, 2023

Methods and apparatus for performing attestation

Inventors: Brendan James Moran (Histon, GB); Derek Del Miller (Austin, TX); Hannes Tschofenig (Cambridge, GB)
Assignee: Izuma Tech, Inc.
H04L9/3234H04L9/3236H04L9/3247
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Quick Facts
Patent No.
US 11,595,213
App. No.
16/914,714
Granted
Feb 28, 2023
Kind
B2
Abstract

Aspects of the present disclosure relate to an apparatus comprising first interface circuitry to communicate with relying party circuitry, the first interface circuitry being configured to receive, from the relying party circuitry, an attestation request in respect of a processing operation requested by attester circuitry to be performed by the relying party circuitry; second interface circuitry to communicate with the attester circuitry, the second interface circuitry being configured to: transmit the attestation request to the attester circuitry; and receive, from the attester circuitry, evidence data associated with the processing operation, and third interface circuitry to communicate with verifier circuitry, the third interface circuitry being configured to: transmit the evidence data to the verifier circuitry; and receive, from the verifier circuitry, attestation result data indicative of a verification of the evidence data, wherein the first interface circuitry is configured to transmit the attestation result data to the relying party circuitry.

Claims (54)

1. An apparatus comprising:

first interface circuitry to communicate with relying party circuitry, the first interface circuitry being configured to receive, from the relying party circuitry, an attestation request in respect of a processing operation to be performed by the relying party circuitry;

second interface circuitry to communicate with attester circuitry, the second interface circuitry being configured to:

transmit the attestation request to the attester circuitry; and

receive, from the attester circuitry, evidence data associated with the processing operation, and

third interface circuitry to communicate with verifier circuitry, the third interface circuitry being configured to:

transmit the evidence data to the verifier circuitry; and

receive, from the verifier circuitry, attestation result data indicative of a verification of the evidence data,

wherein the first interface circuitry is configured to transmit the attestation result data to the relying party circuitry.

2. An apparatus according to claim 1 , wherein the evidence data evidences an authenticity of said processing operation.

3. An apparatus according to claim 2 , wherein the evidence data comprises data indicative of said processing operation.

4. An apparatus according to claim 3 , wherein the data indicative of said processing operation comprises a cryptographic hash of at least a subset of computer program instructions corresponding to said operation.

5. An apparatus according to claim 2 , wherein the evidence data comprises a cryptographic signature associated with the attester circuitry.

6. An apparatus according to claim 1 , wherein the attester circuitry is implemented within the same physical device as the apparatus.

7. An apparatus according to claim 6 , wherein the attester circuitry implements a trusted execution environment.

8. An apparatus according to claim 1 , comprising fourth interface circuitry to communicate with software authority circuitry, wherein the fourth interface circuitry is configured to:

transmit at least one of the evidence data and the attestation result data to the software authority circuitry;

receive, from the software authority circuitry, security policy result data indicative of a confirmation that said at least one of the evidence data and the attestation result data satisfies a security policy,

wherein the first interface circuitry is configured to perform said transmitting of the attestation result data to the relying party circuitry responsive to said receiving of the security policy result data.

9. An apparatus according to claim 1 , wherein:

the second interface circuitry is configured to receive, from the attester circuitry, software authorisation data associated with said processing operation, the software authorisation data comprising a cryptographic signature associated with a software authority.

10. A method comprising:

transmitting, from relying party circuitry, via relay circuitry, to attester circuitry, an attestation request in respect of a processing operation to be performed by the relying party circuitry;

transmitting, from attester circuitry, via the relay circuitry, to verifier circuitry, evidence data associated with the processing operation; and

transmitting, from the verifier circuitry, via the relay circuitry, to the relying party circuitry, attestation result data indicative of a verification of the evidence data.

11. A method according to claim 10 , comprising determining, by the attester circuitry, the evidence data.

12. A method according to claim 11 , comprising cryptographically signing, by the attester circuitry, the evidence data.

13. A method according to claim 10 , comprising, by the verifier circuitry:

verifying the evidence data; and

responsive to said verifying, determining the attestation result data.

14. A method according to claim 13 , wherein verifying the evidence data comprises confirming, based on the evidence data, that the processing operation satisfies a security policy.

15. A method according to claim 13 , wherein determining the attestation result data comprises cryptographically signing the attestation result data.

16. A method according to claim 10 , comprising, by the relying party circuitry:

confirming the attestation result data; and

responsive to said confirming, performing the processing operation.

17. A method according to claim 16 , wherein confirming the attestation result data comprises confirming that the attestation result data matches expected attestation result data.

18. An apparatus comprising:

first interface circuitry to communicate with relying party circuitry, the first interface circuitry being configured to receive, from the relying party circuitry, an attestation request in respect of a processing operation to be performed by the relying party circuitry;

evidence determination circuitry to:

receive the attestation request from the first interface circuitry; and

determine, in response to the attestation request, evidence data associated with the processing operation, and

second interface circuitry to communicate with verifier circuitry, the second interface circuitry being configured to:

transmit the evidence data to the verifier circuitry; and

receive, from the verifier circuitry, attestation result data indicative of a verification of the evidence data,

wherein the first interface circuitry is configured to transmit the attestation result data to the relying party circuitry.

19. An apparatus according to claim 18 , comprising third interface circuitry to communicate with software authority circuitry, wherein:

the third interface circuitry is configured to:

transmit at least one of the evidence data and the attestation result data to the software authority circuitry;

receive, from the software authority circuitry, security policy result data indicative of a confirmation that said at least one of the evidence data and the attestation result data satisfies a security policy,

wherein the first interface circuitry is configured to perform said transmitting of the attestation result data to the relying party circuitry responsive to said receiving of the security policy result data.

20. An apparatus according to claim 19 , wherein the evidence determination circuitry is configured to:

receive, from software authority circuitry, authorisation data associated with a trusted application to be executed by the evidence determination circuitry;

use the trusted application to perform said determining of the evidence data, and

wherein the first interface circuitry is configured to transmit said authorisation data, with the attestation result data, to the relying party circuitry.

Assignments (3)
CHANGE OF NAME Recorded Jan 26, 2023
From: ARM CLOUD TECHNOLOGY, INC.
To: PELION TECHNOLOGY, INC.
Reel/Frame 062514/0947 →
CHANGE OF NAME Recorded Jan 26, 2023
From: PELION TECHNOLOGY, INC.
To: IZUMA TECH, INC.
Reel/Frame 062514/0960 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2020
From: MORAN, BRENDAN JAMES; MILLER, DEREK DEL; TSCHOFENIG, HANNES
To: ARM CLOUD TECHNOLOGY, INC.
Reel/Frame 053470/0030 →
Continuity (1)
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