Semiconductor device with programmable feature and method for fabricating the same
The present application discloses a semiconductor device with a programmable feature such as anti-fuse and a method for fabricating the semiconductor device. The semiconductor device includes a first insulating layer including a peak portion and an upper portion positioned on the peak portion, and first conductive blocks positioned on two sides of the peak portion. A width of the peak portion is gradually decreased toward a direction opposite to the upper portion, and the first conductive blocks are spaced apart by the peak portion.
1. A semiconductor device, comprising:
a first insulating layer comprising a peak portion and an upper portion positioned on the peak portion;
first conductive blocks positioned on two sides of the peak portion; and
a buried insulating layer positioned below the first conductive blocks, wherein the peak portion is extending to an upper portion of the buried insulating layer;
wherein a width of the peak portion is gradually decreased toward a direction opposite to the upper portion, and the first conductive blocks are spaced apart by the peak portion.
2. The semiconductor device of claim 1 , further comprising first spacers positioned on two sides of the upper portion.
3. The semiconductor device of claim 2 , further comprising a top insulating layer positioned on sides of the first spacers.
4. The semiconductor device of claim 3 , wherein a bottom surface of the top insulating layer is at a vertical level above a vertical level of bottom surfaces of the first spacers.
5. The semiconductor device of claim 4 , wherein a top surface of the first insulating layer and top surfaces of the first conductive blocks are substantially coplanar.
6. The semiconductor device of claim 5 , wherein a bottommost point of the peak portion is at a same vertical level as bottom surfaces of the first conductive blocks.
7. The semiconductor device of claim 5 , wherein a bottommost point of the peak portion is at a vertical level lower than a vertical level of bottom surfaces of the first conductive blocks.
8. The semiconductor device of claim 6 , wherein an angle between the two sides of the peak portion is between about 60 degree and about 80 degree.
9. The semiconductor device of claim 1 , further comprising a bottom layer positioned below the buried insulating layer.
10. A semiconductor device, comprising:
a first insulating layer comprising a peak portion having a V-shaped cross-sectional profile and upper portions positioned on two ends of the peak portion;
first conductive blocks positioned on two sides of the peak portion;
a first filler layer positioned on the peak portion and positioned between the upper portions; and
a first work function layer positioned between the first insulating layer and the first filler layer;
wherein the first conductive blocks are spaced apart by the peak portion.
11. The semiconductor device of claim 10 , wherein a bottommost point of the peak portion is at a vertical level lower than a vertical level of bottom surfaces of the first conductive blocks.
12. The semiconductor device of claim 11 , further comprising a buried insulating layer positioned below the first conductive blocks, wherein the peak portion is extending to an upper portion of the buried insulating layer.