IP Library Granted Patent US 11,088,276
Granted Patent B2
US 11,088,276 · App. 16/918,810 · Granted Aug 10, 2021

Silicon carbide semiconductor device

Inventors: Takeru Suto (Tokyo, JP); Naoki Tega (Tokyo, JP); Naoki Watanabe (Tokyo, JP)
Assignee: HITACHI, LTD.
H01L29/7813H01L29/0696H01L29/1095H01L29/1608H01L29/4236
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Quick Facts
Patent No.
US 11,088,276
App. No.
16/918,810
Granted
Aug 10, 2021
Kind
B2
Abstract

A plurality of trench gate electrodes are formed from an upper surface to reach an intermediate depth of an n-type SiC epitaxial substrate including an n-type drain region on a lower surface and an n-type source region on an upper surface in contact with the source region to be arranged in a direction along the upper surface. Here, at least three side surfaces among four side surfaces of each of the trench gate electrodes having a rectangular planar shape are in contact with a p-type body layer below the source region. In addition, a JFET region in the SiC epitaxial substrate and a source electrode connected to the source region immediately above the JFET region extend along a direction in which the plurality of trench gate electrodes are arranged.

Claims (54)

1. A silicon carbide semiconductor device comprising:

a silicon carbide semiconductor substrate of a first conductivity type;

a drain electrode connected to a lower surface of the silicon carbide semiconductor substrate;

a semiconductor layer of the first conductivity type that is formed on the silicon carbide semiconductor substrate and contains silicon carbide;

a first semiconductor region of the first conductivity type formed on an upper surface of the semiconductor layer;

a second semiconductor region of a second conductivity type, different from the first conductivity type, formed below the first semiconductor region in the semiconductor layer;

a third semiconductor region of the first conductivity type that is formed below the second semiconductor region in the semiconductor layer, has a lower impurity concentration than the first semiconductor region and the silicon carbide semiconductor substrate, and is in contact with the silicon carbide semiconductor substrate;

a plurality of trenches that are formed from the upper surface of the semiconductor layer to an intermediate depth of the semiconductor layer below the second semiconductor region and arranged in a first direction along the upper surface of the semiconductor layer, the trench having a rectangular planar shape;

a gate electrode formed inside each of the plurality of trenches via an insulating film; and

a source electrode that is electrically connected to the first semiconductor region and extends in the first direction,

wherein at least three side surfaces among four side surfaces of the trench are in contact with the second semiconductor region.

2. The silicon carbide semiconductor device according to claim 1 , further comprising

a fourth semiconductor region of the first conductivity type that is formed below the second semiconductor region in the semiconductor layer, is in contact with the side surface of the trench, and has a higher impurity concentration than the third semiconductor region;

a fifth semiconductor region of the second conductivity type that is formed immediately below the fourth semiconductor region in the semiconductor layer, is continuously in contact with a bottom surface and the side surface of the trench, and has a higher impurity concentration than the second semiconductor region; and

a sixth semiconductor region of the first conductivity type that is adjacent to the fourth semiconductor region and the fifth semiconductor region in the semiconductor layer and has a lower impurity concentration than the fourth semiconductor region,

wherein the sixth semiconductor region extends in the first direction.

3. The silicon carbide semiconductor device according to claim 2 , wherein

the fourth semiconductor region has a higher impurity concentration than the fifth semiconductor region.

4. The silicon carbide semiconductor device according to claim 2 , further comprising:

a plurality of unit cells each of which is constituted by the first semiconductor region, the second semiconductor region, the third semiconductor region, the fourth semiconductor region, the fifth semiconductor region, the sixth semiconductor region, the trench, and the gate electrode, the plurality of unit cells repeatedly provided in the first direction in a plan view;

a first region that is a first end portion of the unit cell in the first direction and is separated from each of the fourth semiconductor region and the first semiconductor region in a plan view; and

a seventh semiconductor region of the second conductivity type that is formed on the upper surface of the semiconductor layer in the first region and has a higher impurity concentration than the second semiconductor region,

wherein the second semiconductor region and the fifth semiconductor region are electrically connected to the source electrode via the seventh semiconductor region.

5. The silicon carbide semiconductor device according to claim 4 , wherein

the unit cell includes a second end portion and a third end portion opposite to the second end portion in a second direction orthogonal to the first direction in a plan view,

the source electrode is located at the second end portion,

the third end portion and the first semiconductor region are separated from each other, and

the seventh semiconductor region is formed on the upper surface of the semiconductor layer at the third end portion.

6. The silicon carbide semiconductor device according to claim 2 , wherein

the source electrode and the sixth semiconductor region overlap with each other in a plan view.

7. The silicon carbide semiconductor device according to claim 2 , further comprising

a plurality of unit cells each of which is constituted by the first semiconductor region, the second semiconductor region, the third semiconductor region, the fourth semiconductor region, the fifth semiconductor region, the sixth semiconductor region, the trench, and the gate electrode, the plurality of unit cells repeatedly provided in the first direction in a plan view,

wherein the source electrode, the trench, and the sixth semiconductor region in the unit cell are sequentially arranged in a second direction orthogonal to the first direction in a plan view.

8. The silicon carbide semiconductor device according to claim 1 , further comprising

a plurality of seventh semiconductor regions of the second conductivity type that are formed on the upper surface of the semiconductor layer immediately below the source electrode, have a higher impurity concentration than the second semiconductor region, and are arranged in the first direction,

wherein the seventh semiconductor region is in contact with the second semiconductor region, and

the second semiconductor region and the source electrode are electrically connected via the seventh semiconductor region.

9. The silicon carbide semiconductor device according to claim 4 , wherein

among the four side surfaces of the trench located at a fourth end portion in the first direction of the unit cell, the side surface on one side in the first direction is in contact with the seventh semiconductor region and is separated from the first semiconductor region, and the side surface on another side in the first direction is in contact with the first semiconductor region.

10. The silicon carbide semiconductor device according to claim 2 , further comprising

a plurality of seventh semiconductor regions of the second conductivity type that are formed on the upper surface of the semiconductor layer immediately below the source electrode, have a higher impurity concentration than the second semiconductor region, and are arranged in the first direction,

wherein the seventh semiconductor region is in contact with each of the second semiconductor region and the fifth semiconductor region, and

the second semiconductor region and the source electrode are electrically connected via the seventh semiconductor region.

11. The silicon carbide semiconductor device according to claim 2 , wherein

a shortest distance from a side surface of the trench to an end portion of the fifth semiconductor region is 0.3 μm or more in a second direction orthogonal to the first direction in a plan view.

12. The silicon carbide semiconductor device according to claim 1 , wherein

the trench extends in a second direction orthogonal to the first direction in a plan view.

13. The silicon carbide semiconductor device according to claim 1 , wherein

the first semiconductor region, the second semiconductor region, the third semiconductor region, the trench, and the gate electrode constitute each of a plurality of unit cells repeatedly provided in a second direction orthogonal to the first direction in a plan view, and

each structure of the unit cells adjacent in the second direction has a line-symmetric relation in a plan view.

14. The silicon carbide semiconductor device according to claim 1 , wherein

the first semiconductor region, the second semiconductor region, the third semiconductor region, the trench, the source electrode, and the gate electrode constitute each of a plurality of unit cells repeatedly provided in a second direction orthogonal to the first direction in a plan view,

the plurality of unit cells constitute a cell array, and

the source electrode is located at a fifth end portion on one side of the cell array in the second direction in each of the plurality of unit cells.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2024
From: HITACHI, LTD.
To: MINEBEA POWER SEMICONDUCTOR DEVICE INC.
Reel/Frame 068678/0937 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2020
From: SUTO, TAKERU; TEGA, NAOKI; WATANABE, NAOKI
To: HITACHI, LTD.
Reel/Frame 053106/0691 →
Priority Claims (1)
JP JP2019-125742 · Jul 5, 2019 · national
Continuity (1)
Related Publication 20210005746A1 · Jan 7, 2021