IP Library Granted Patent US 11,837,509
Granted Patent B1
US 11,837,509 · App. 16/920,069 · Granted Dec 5, 2023

Method of manufacturing and packaging silicon photonics integrated circuit dies in wafer form

Inventors: Hsu-Feng Chou (Westlake Village, CA); Keith Nellis (Westlake Village, CA); Loi Nguyen (Westlake Village, CA)
Assignee: MARVELL ASIA PTE LTD
H01L22/10G01M11/30G02B6/13H01L31/02325H01L31/1808
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Quick Facts
Patent No.
US 11,837,509
App. No.
16/920,069
Granted
Dec 5, 2023
Kind
B1
Abstract

A method of packaging the silicon photonics wafer for fabricating custom optical-electrical modules includes fabricating a wafer with multiple dies of silicon photonics circuits based on custom design and conducting electrical and optical tests of the silicon photonics circuits in wafer level. The method further includes preparing the wafer for next point of use. Additionally, the method includes performing post-wafer processing on the wafer received at the next point of use. The method further includes conducting post-process electrical tests of the silicon photonics circuits in wafer level. Furthermore, the method includes preparing the wafer with known-good-dies or a known-good-wafer identified for custom use. Moreover, the method includes performing custom process on the know good dies.

Claims (12)

1. A silicon photonics integrated circuit comprising:

a plurality of optical devices, ones of the optical devices including inputs and outputs configured for use during normal operation and additionally including test inputs and test outputs configured for use during testing;

optical couplers coupled to the test inputs of the optical devices, the optical couplers configured to couple optical test signals to the test inputs during the testing of the optical devices to test optical characteristics of the optical devices, wherein the optical characteristics of the optical devices comprise one or more of temporal, magnitude, and frequency characteristics of signals at one or more of the inputs and outputs of the optical devices; and

photodetectors coupled to the test outputs of the optical devices, the photodetectors configured to detect output signals at the test outputs, the output signals including responses of the optical devices to the optical test signals during the testing of the optical devices, the output signals being indicative of the optical characteristics of the optical devices.

2. The silicon photonics integrated circuit of claim 1 wherein the optical couplers are configured to couple light from a fiber-based light source into the test inputs of the optical devices during the testing of the optical devices.

3. The silicon photonics integrated circuit of claim 1 further comprising additional photodetectors coupled to the test inputs of the optical devices to test additional optical characteristics of the optical devices during the testing of the optical devices.

4. The silicon photonics integrated circuit of claim 1 wherein the optical couplers and the photodetectors are unused during the normal operation of the optical devices.

5. The silicon photonics integrated circuit of claim 1 wherein the optical couplers and the photodetectors are not connected to the inputs and outputs used during the normal operation of the optical devices.

6. The silicon photonics integrated circuit of claim 1 wherein the optical devices comprise optical modulators, optical combiners, and optical splitters and wherein the optical couplers comprise grating couplers.

7. The silicon photonics integrated circuit of claim 1 wherein the optical devices comprise optical modulators and wherein the optical characteristics include extinction ratios, propagation losses, and bandwidths of the optical modulators.

8. The silicon photonics integrated circuit of claim 1 wherein the optical characteristics include (i) a transmission spectrum and (ii) responsivity of the optical devices in a selected wavelength band.

9. The silicon photonics integrated circuit of claim 1 wherein the optical characteristics include insertion losses of transmit paths associated with the optical devices in the silicon photonics integrated circuit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2020
From: CHOU, HSU-FENG; NELLIS, KEITH; NGUYEN, LOI
To: INPHI CORPORATION
Reel/Frame 053128/0794 →