IP Library Granted Patent US 11,430,896
Granted Patent B2
US 11,430,896 · App. 16/928,254 · Granted Aug 30, 2022

Semiconductor device and manufacturing method thereof

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L27/1207H01L27/1214H01L27/1225H01L29/66969H01L29/78618H01L29/78693
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Quick Facts
Patent No.
US 11,430,896
App. No.
16/928,254
Granted
Aug 30, 2022
Kind
B2
Abstract

A semiconductor device capable of high speed operation is provided. Further, a highly reliable semiconductor device is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed in such a manner that one or more of elements selected from rare gases and hydrogen are added to the semiconductor layer by an ion doping method or an ion implantation method with the use of a channel protective layer as a mask.

Claims (18)

1. A semiconductor device comprising:

a first transistor;

a second transistor; and

a capacitor;

wherein the first transistor comprises silicon comprising a first channel formation region and a first gate electrode overlapping with the first channel formation region,

wherein the second transistor comprises:

a first insulating layer;

an oxide semiconductor layer comprising a second channel formation region over the first insulating layer;

a second insulating layer over the oxide semiconductor layer;

a second gate electrode, over the second insulating layer; and

a third insulating layer over the second gate electrode; wherein one of a source and a drain of the second transistor is electrically connected to an electrode of the capacitor, wherein the one of the source and the drain of the second transistor is electrically connected to a gate of the first transistor,

wherein the first insulating layer includes oxygen,

wherein the third insulating layer comprises silicon oxide, and

wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

2. The semiconductor device according to claim 1 ,

wherein the first insulating layer is oxygen-excess silicon oxide.

3. The semiconductor device according to claim 2 ,

wherein the oxide semiconductor layer comprises a crystalline region where a c-axis is aligned in parallel with a normal vector of a surface of the oxide semiconductor layer.

Priority Claims (1)
JP 2010-293246 · Dec 28, 2010 · national
Continuity (3)
Continuation 15259389 · Sep 8, 2016
Continuation 13330811 · Dec 20, 2011
Related Publication 20200381558A1 · Dec 3, 2020