IP Library Granted Patent US 12,575,749
Granted Patent B2
US 12,575,749 · App. 16/933,396 · Granted Mar 17, 2026

Heterogeneous architecture integration of silicon photodiode and accelerometer

Inventor: Shrenik Deliwala (Andover, MA)
Assignee: Analog Devices, Inc.
A61B5/02427A61B5/6802A61B2562/0219A61B2562/0238A61B2562/028A61B2562/164A61B2562/227
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Quick Facts
Patent No.
US 12,575,749
App. No.
16/933,396
Granted
Mar 17, 2026
Kind
B2
Abstract

A novel, modified MEMS accelerometer with additional ability to measure optical radiation due to integration of silicon photodiode in the silicon cap. The silicon cap is used to protect the MEMS based accelerometer from the environment. The function of the cap is enhanced to include optical measurement. The entire sensor element including accelerometer and photodiode (XL+PD) occupies no more space than the XL alone.

Claims (24)

1 . A single package accelerometer and photodiode comprising:

an accelerometer having a top portion and a bottom portion, the top portion of the accelerometer comprising a MEMS device;

a cap having a top portion and bottom portion, the cap defining an etched cavity configured to enclose the MEMS device of the accelerometer, the cap arranged in a stacked configuration upon a first semiconductor structure comprising the accelerometer; and,

wherein the cap comprises a second semiconductor structure comprising a photodiode, the photodiode having a top portion and bottom portion, a photosensitive region of the photodiode located in the top portion of the cap on a surface of the cap opposite the etched cavity, the etched cavity facing the MEMS device; and

wherein the accelerometer and photodiode are included as a portion of a commonly shared integrated circuit package.

2 . The single package accelerometer and photodiode of claim 1 , wherein the cap further comprises a first electrical connection coupled with circuitry configured for biasing protection of the accelerometer.

3 . The single package accelerometer and photodiode of claim 1 , wherein the bottom portion of the photodiode further comprises an electrical connection coupled with circuitry configured for biasing protection of the accelerometer.

4 . The single package accelerometer and photodiode of claim 3 , further comprising a second electrical connection in electrical communication with the photodiode.

5 . The single package accelerometer and photodiode of claim 4 , wherein the second electrical connection is configured to pass through the cap.

6 . The single package accelerometer and photodiode of claim 1 , wherein the bottom portion of the cap further comprises a metalized layer configured to prevent light from passing into the accelerometer.

7 . The single package accelerometer and photodiode of claim 1 , further comprising a bond pad disposed in the accelerometer.

8 . The single package accelerometer and photodiode of claim 7 , further comprising an ASIC.

9 . The single package accelerometer and photodiode of claim 8 , wherein the ASIC is in electrical communication with the accelerometer and photodiode.

10 . The single package accelerometer and photodiode of claim 9 , wherein the integrated circuit package comprises an optically transparent material configured to protect any exposed surfaces of the accelerometer, photodiode, cap and ASIC.

11 . A system in an integrated circuit package comprising:

a substrate;

a light source disposed on the substrate;

an accelerometer having a top portion and a bottom portion, the top portion of the accelerometer comprising a MEMS device;

a cap having a top portion and bottom portion, the cap defining an etched cavity configured to enclose the MEMS device of the accelerometer, the cap arranged in a stacked configuration upon a first semiconductor structure comprising the accelerometer, the cap comprising a second semiconductor comprising a photodiode, the photodiode having a top portion and bottom portion, a photosensitive region of the photodiode located in the top portion of the cap on a surface of the cap opposite the etched cavity, the etched cavity facing the MEMS device;

a septum disposed on the substrate between the light source and the photodiode, the septum configured to block direct illumination of the photodiode by the light source; and

an ASIC in electrical communication with photodiode and accelerometer.

12 . The system in the integrated circuit package of claim 11 , wherein the ASIC is configured to control synchronous blinking of the light source for PPG based and other synchronous optical measurements.

13 . The single package accelerometer and photodiode of claim 1 , wherein the cap defining the etched cavity comprises a doped material grown on an intrinsic epitaxial layer, the doped material etched to define the cavity.

14 . The system of claim 11 , wherein the cap defining the etched cavity comprises a doped material grown on an intrinsic epitaxial layer, the doped material etched to define the cavity.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2020
From: DELIWALA, SHRENIK
To: ANALOG DEVICES, INC.
Reel/Frame 053319/0404 →
Continuity (2)
Provisional Application 62887196 · Aug 15, 2019
Related Publication 20210045643A1 · Feb 18, 2021
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