Distributing interrupt request to be handled by target virtual processor

1. An apparatus comprising:

an interrupt distributor to receive an interrupt request to be handled by a target virtual processor selected from among a plurality of virtual processors mappable to a plurality of physical processors, where the interrupt distributor is responsible for distributing interrupt requests to a subset of said physical processors; and

an interface to communicate with further interrupt distributors responsible for distributing interrupt requests to physical processors other than said subset of said physical processors; in which:

in response to the interrupt request, the interrupt distributor is configured to:

determine, based on cached virtual processor mapping information, whether to route the interrupt request to one of said subset of physical processors or to one of the further interrupt distributors; and

when a rejection response is received in response to an interrupt request routed to one of the further interrupt distributors:

request an update of the cached virtual processor mapping information based on shared virtual processor mapping information obtained from a storage location accessible to the interrupt distributor and the further interrupt distributors; and

route a resent interrupt request to a further interrupt distributor determined based on the shared virtual processor mapping information.

2. The apparatus according to claim 1 , comprising:

mapping update circuitry responsive to a virtual processor transfer command indicating that a given virtual processor is to be transferred from a source physical processor to a destination physical processor, to update the shared virtual processor mapping information to indicate that the given virtual processor is mapped to the destination physical processor.

3. The apparatus according to claim 2 , in which the mapping update circuitry is associated with the interrupt distributor, and is configured to update the shared virtual processor mapping information when the destination physical processor is one of said subset of said physical processors for which the interrupt distributor is responsible.

4. The apparatus according to claim 3 , in which the mapping update circuitry is configured to update the cached virtual processor mapping information, when the source physical processor or the destination physical processor is one of said subset of said physical processors for which the interrupt distributor is responsible.

5. The apparatus according to claim 2 , in which the mapping update circuitry is configured to update the shared virtual processor mapping information without broadcasting the update of the shared virtual processor mapping information to one or more further interrupt distributors which are not responsible for distributing interrupt requests to either the source physical processor or the destination physical processor.

6. The apparatus according to claim 1 , in which, in response to a received interrupt request received at the interrupt distributor from a given further interrupt distributor:

when the cached virtual processor mapping information indicates that a target virtual processor specified by the received interrupt request is mapped to one of said subset of physical processors for which the interrupt distributor is responsible, the interrupt distributor is configured to pass the received interrupt request to the physical processor to which the target virtual processor is mapped, and to return an acknowledgement response to the given further interrupt distributor; and

when the cached virtual processor mapping information indicates that the target virtual processor specified by the received interrupt request is not mapped to one of said subset of physical processors, the interrupt distributor is configured to provide said rejection response to the given further interrupt distributor.

7. The apparatus according to claim 1 , in which when a resent interrupt request is sent to said one of said further interrupt distributors following at least one earlier attempt to send the interrupt request or the resent interrupt request to the same one of said further interrupt distributors:

the interrupt distributor is configured to issue the resent interrupt request with a different encoding to an encoding used for a first attempt to send the interrupt request or the resent interrupt request to said one of said further interrupt distributors.

8. The apparatus according to claim 1 , comprising monitoring circuitry to perform monitoring for transfer of a specified virtual processor, to maintain tracking information indicating whether the specified virtual processor has been subject to a transfer of mapping to or from one of said subset of physical processors associated with the interrupt distributor.

9. The apparatus according to claim 8 , in which in response to receipt of a resent interrupt request from a given further interrupt distributor, when at least one earlier attempt was already made to send the interrupt request or the resent interrupt request to the interrupt distributor, the cached virtual processor mapping information indicates that a target virtual processor specified by the resent interrupt request is not mapped to one of said subset of physical processors, and the monitoring circuitry is not already monitoring whether the target virtual processor has been subject to said transfer of mapping:

the interrupt distributor is configured to control the monitoring circuitry to start monitoring of whether the target virtual processor is subject to said transfer of mapping.

10. The apparatus according to claim 8 , in which in response to receipt of a resent interrupt request from a given further interrupt distributor, when at least one earlier attempt was already made to send the interrupt request or the resent interrupt request to the interrupt distributor, the cached virtual processor mapping information indicates that a target virtual processor specified by the resent interrupt request is not mapped to one of said subset of physical processors, the monitoring circuitry has been monitoring for transfer of said target virtual processor, and the tracking information indicates that the monitoring circuitry has not detected said transfer of mapping for the target virtual processor:

the interrupt distributor is configured to provide an abort response to the given further interrupt distributor.

11. The apparatus according to claim 10 , in which in response to receipt of said abort response from a further interrupt distributor in response to a resent interrupt request sent to that further interrupt distributor, the interrupt distributor is configured to trigger an error handling response action.

12. The apparatus according to claim 8 , in which in response to receipt of a resent interrupt request from a given further interrupt distributor, when at least one earlier attempt was already made to send the interrupt request or the resent interrupt request to the interrupt distributor, the cached virtual processor mapping information indicates that a target virtual processor specified by the resent interrupt request is not mapped to one of said subset of physical processors, the monitoring circuitry has been monitoring for transfer of said target virtual processor, and the tracking information indicates that the monitoring circuitry has detected said transfer of mapping for the target virtual processor, the interrupt distributor is configured to provide the rejection response to the given further interrupt distributor.

13. The apparatus according to claim 1 , in which said subset of physical processors comprises at least two physical processors.

14. The apparatus according to claim 1 , in which said subset of physical processors comprises a single physical processor.

15. The apparatus according to claim 1 , in which at least one of the further interrupt distributors is on a different integrated circuit to the interrupt distributor.

16. The apparatus according to claim 1 , in which at least one of the further interrupt distributors is on a same integrated circuit as the interrupt distributor.

17. The apparatus according to claim 1 , also comprising said further interrupt distributors.

18. An apparatus comprising:

means for distributing interrupt requests, to receive an interrupt request to be handled by a target virtual processor selected from among a plurality of virtual processors mappable to a plurality of physical processors, where the means for distributing is responsible for distributing interrupt requests to a subset of said physical processors; and

means for communicating with further means for distributing interrupt requests to physical processors other than said subset of said physical processors; in which:

in response to the interrupt request, the means for distributing is configured to:

determine, based on cached virtual processor mapping information, whether to route the interrupt request to one of said subset of physical processors or to one of the further means for distributing; and

when a rejection response is received in response to an interrupt request routed to one of the further means for distributing:

request an update of the cached virtual processor mapping information based on shared virtual processor mapping information obtained from a storage location accessible to the means for distributing and the further means for distributing; and

route a resent interrupt request to a further means for distributing determined based on the shared virtual processor mapping information.

19. A method comprising:

receiving, at an interrupt distributor, an interrupt request to be handled by a target virtual processor selected from among a plurality of virtual processors mappable to a plurality of physical processors, where the interrupt distributor is responsible for distributing interrupt requests to a subset of said physical processors, and further interrupt distributors are responsible for distributing interrupt requests to physical processors other than said subset of said physical processors; and

in response to the interrupt request, the interrupt distributor:

determining, based on cached virtual processor mapping information, whether to route the interrupt request to one of said subset of physical processors or to one of the further interrupt distributors; and

when a rejection response is received in response to an interrupt request routed to one of the further interrupt distributors:

requesting an update of the cached virtual processor mapping information based on shared virtual processor mapping information obtained from a storage location accessible to the interrupt distributor and the further interrupt distributors; and

routing a resent interrupt request to a further interrupt distributor determined based on the shared virtual processor mapping information.