IP Library Granted Patent US 11,957,005
Granted Patent B2
US 11,957,005 · App. 16/937,412 · Granted Apr 9, 2024

Display device

Inventors: Seo Won Choe (Seongnam-si, KR); Ki Wook Kim (Hwaseong-si, KR); Yang Wan Kim (Hwaseong-si, KR); Hyun Woong Kim (Gwangmyeong-si, KR); Eun Byul Jo (Daegu, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/131G09G3/3266H10K59/1216H10K59/126H10K59/40G06F3/0446
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Quick Facts
Patent No.
US 11,957,005
App. No.
16/937,412
Granted
Apr 9, 2024
Kind
B2
Abstract

A display device includes: a substrate; scan lines extending in a first direction, and arranged along a second direction crossing the first direction on the substrate; data lines extending in the second direction, and arranged along the first direction on the substrate; a display area including pixels connected to the scan lines and the data lines; and a non-display area around the display area, and including compensation capacitors connected to some scan lines from among the scan lines. A sum of a capacitance of q odd scan lines or q even scan lines that are adjacent to each other from among the scan lines increases in the second direction, where q is a positive integer.

Claims (66)

1. A display device comprising:

a substrate;

scan lines extending in a first direction, and arranged along a second direction crossing the first direction on the substrate;

data lines extending in the second direction, and arranged along the first direction on the substrate;

a display area comprising pixels connected to the scan lines and the data lines;

a non-display area around the display area, and comprising compensation capacitors connected to some scan lines from among the scan lines;

a first driving voltage line connected to a second electrode of the compensation capacitor; and

a sub-driving voltage line connected to a first electrode of a compensation capacitor from among the compensation capacitors, and connected to the first driving voltage line through a connection contact hole,

wherein a sum of a capacitance of q odd scan lines or q even scan lines that are adjacent to each other from among the scan lines increases in the second direction, where q is a positive integer.

2. The display device of claim 1 ,

wherein the sum of the capacitance of the q odd scan lines or the q even scan lines is defined as a sum of a capacitance of a pth scan line, a capacitance of a (p+2)th scan line, and capacitance of a (p+4)th scan line, where p is a positive integer.

3. The display device of claim 2 ,

wherein the sum of the capacitance of the q odd scan lines or the q even scan lines increases as the p increases.

4. The display device of claim 2 ,

wherein the sum of the capacitance of the pth scan line, the capacitance of the (p+2)th scan line, and the capacitance of the (p+4)th scan line is less than a sum of a capacitance of the (p+2)th scan line, the capacitance of the (p+4)th scan line, and a capacitance of a p+6th scan line.

5. The display device of claim 2 ,

wherein a number of the compensation capacitors connected to the pth scan line is greater than a number of the compensation capacitors connected to a (p+1)th scan line.

6. The display device of claim 5 ,

wherein the number of the compensation capacitors connected to the (p+1)th scan line is less than a number of the compensation capacitors connected to the (p+2)th scan line.

7. The display device of claim 1 , wherein each of the compensation capacitors comprises:

the first electrode connected to one of the scan lines; and

a second electrode overlapping with the first electrode, and electrically connected to a first driving voltage line to which a first driving voltage is applied.

8. The display device of claim 7 ,

wherein each of the pixels comprises a driving transistor comprising an active layer on a buffer film, and a first electrode, a second electrode, and a gate electrode on the active layer, and

wherein the first electrode of the compensation capacitor is on the buffer film.

9. The display device of claim 8 ,

wherein the second electrode of the compensation capacitor is on a first insulating film on the gate electrode.

10. The display device of claim 9 ,

wherein the first driving voltage line is on a second insulating film on the second electrode of the compensation capacitor.

11. The display device of claim 10 , wherein the sub- driving voltage line is on the buffer film,

wherein the first driving voltage line is connected to the sub-driving voltage line through the connection contact hole penetrating the first insulating film and the second insulating film.

12. The display device of claim 1 , wherein the display area comprises:

a first display area;

a second display area protruding from a first side of the first display area in the second direction; and

a third display area protruding from the first side of the first display area in the second direction, the third display area being spaced from the second display area in the first direction,

wherein the non-display area comprises a notch non-display area at a notch area between the second display area and the third display area in the first direction, and

wherein the compensation capacitors are located at the notch non-display area.

13. The display device of claim 12 ,

wherein scan lines of the second display area are electrically separated from scan lines of the third display area.

14. The display device of claim 13 , further comprising:

a first scan driver adjacent to the second display area and connected to the scan lines of the second display area; and

a second scan driver adjacent to the third display area and connected to the scan lines of the third display area.

15. A display device comprising:

a display area comprising scan lines extending in a first direction, data lines extending in a second direction crossing the first direction, and pixels connected to the scan lines and the data lines;

a non-display area around the display area, and comprising compensation capacitors connected to some of the scan lines;

a first driving voltage line connected to a second electrode of the compensation capacitor; and

a sub-driving voltage line connected to a first electrode of a compensation capacitor from among the compensation compacitors, and connected to the first driving voltage line through a connection contact hole,

wherein a number of the compensation capacitors connected to a pth scan line from among the scan lines is greater than a number of the compensation capacitors overlapping with a (p+1)th scan line from among the scan lines, where p is a positive integer.

16. The display device of claim 15 ,

wherein the number of the compensation capacitors connected to the (p+1)th scan line is less than a number of the compensation capacitors connected to a (p+2)th scan line.

17. The display device of claim 15 ,

wherein a capacitance of q odd scan lines or q even scan lines that are adjacent to each other from among the scan lines increases in the second direction, where q is a positive integer, and

the capacitance of the q odd scan lines or the q even scan lines is defined as a sum of a capacitance of the pth scan line, a capacitance of a (p+2)th scan line, and a capacitance of a (p+4)th scan line.

18. A display device, comprising:

a substrate;

an active layer of a driving transistor and a first electrode of a compensation capacitor, the active layer and the first electrode being arranged on the substrate;

a gate insulating film on the active layer of the driving transistor and the first electrode of the compensation capacitor; and

a second electrode of the compensation capacitor on the gate insulating film, and overlapping with the first electrode of the compensation capacitor in a thickness direction of the substrate,

wherein the active layer of the driving transistor and the first electrode of the compensation capacitor includes a same material.

19. The display device of claim 18 , further comprising:

a gate electrode of the driving transistor on the gate insulating film, and overlapping the active layer of the driving transistor in the thickness direction of the substrate;

a first insulating film on the gate electrode;

a second insulating film on the second electrode of the compensation capacitor; and

a first driving voltage line on the second insulating film, the first driving voltage line configured to receive a first driving voltage.

20. The display device of claim 19 ,

wherein the first driving voltage line is connected to the first electrode of the compensation capacitor through a connection contact hole penetrating the first insulating film and the second insulating film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2020
From: CHOE, SEO WON; KIM, KI WOOK; KIM, YANG WAN; KIM, HYUN WOONG; JO, EUN BYUL
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 053297/0989 →
Priority Claims (1)
KR 10-2019-0148335 · Nov 19, 2019 · national
Continuity (1)
Related Publication 20210151542A1 · May 20, 2021