IP Library Granted Patent US 11,588,089
Granted Patent B2
US 11,588,089 · App. 16/937,715 · Granted Feb 21, 2023

Printed wiring board having thermoelectric emlement accommodatred therein

Inventor: Hirotaka Taniguchi (Ogaki, JP)
Assignee: IBIDEN CO., LTD.
H01L35/10H01L35/32H05K1/0206H05K1/0209H05K7/205H05K2201/10219
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Quick Facts
Patent No.
US 11,588,089
App. No.
16/937,715
Granted
Feb 21, 2023
Kind
B2
Abstract

A printed wiring board includes a core substrate including core material and having opening such that the opening penetrates through the core substrate, thermoelectric elements including P-type and N-type thermoelectric elements such that the thermoelectric elements are accommodated in the opening of the core substrate, a first build-up layer that mounts a heat-absorbing element thereon and includes a first resin insulating layer such that the first resin insulating layer is formed on first surface of the core substrate and covering the opening of the core substrate, and a second build-up layer that mounts a heat-generating element thereon and includes a second resin insulating layer such that the formed on the second resin insulating layer is foamed on second surface of the core substrate on the opposite side and covering the opening of the core substrate and has thickness that is greater than thickness of the first resin insulating layer.

Claims (35)

1. A printed wiring board, comprising:

a core substrate comprising a core material and having an opening such that the opening penetrates through the core substrate;

a plurality of thermoelectric elements comprising a plurality of P-type thermoelectric elements and a plurality of N-type thermoelectric elements such that the plurality of thermoelectric elements is accommodated in the opening of the core substrate;

a first build-up layer configured to mount a heat-absorbing element thereon and comprising a first resin insulating layer such that the first resin insulating layer is formed on a first surface of the core substrate and covering the opening of the core substrate; and

a second build-up layer configured to mount a heat-generating element thereon and comprising a second resin insulating layer such that the second resin insulating layer is formed on a second surface of the core substrate on an opposite side with respect to the first surface of the core substrate and covering the opening of the core substrate and has a thickness that is greater than a thickness of the first resin insulating layer,

wherein the first build-up layer includes a first conductor layer formed on the first resin insulating layer, and a plurality of first via conductors penetrating through the first resin insulating layer and connecting the first conductor layer to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, the second build-up layer includes a second conductor layer formed on the second resin insulating layer, and a plurality of second via conductors penetrating through the second resin insulating layer and connecting the second conductor layer to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements such that each of the second via conductors has a length that is greater than a length of each of the first via conductors, and each of the first and second via conductors has a recess portion formed on an upper surface thereof such that the recess portion in each of the second via conductors has a depth that is greater than a depth of the recess portion in each of the first via conductors.

2. The printed wiring board according to claim 1 , wherein the first build-up layer includes an outermost third resin insulating layer formed on the first resin insulating layer and is formed such that the first resin insulating layer comprises a resin material and does not contain a core material and that the outermost third resin insulating layer comprises a resin material and a core material, and the second build-up layer includes an outermost fourth resin insulating layer formed on the second resin insulating layer and is formed such that the second resin insulating layer comprises a resin material and does not contain a core material and that the outermost fourth resin insulating layer comprises a resin material and a core material.

3. The printed wiring board according to claim 2 , wherein the first build-up layer is formed such that no via conductors penetrating through the outermost third resin insulating layer are formed on the plurality of first via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, and the second build-up layer is formed such that no via conductors penetrating through the outermost fourth resin insulating layer are formed on the plurality of second via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements.

4. The printed wiring board according to claim 1 , wherein the plurality of thermoelectric elements is positioned in rows and columns in the opening of the core substrate such that the P-type thermoelectric elements and the N-type thermoelectric elements are alternately positioned at intersection points of the rows and the columns.

5. The printed wiring board according to claim 4 , wherein the rows and the columns are same numbers.

6. The printed wiring board according to claim 4 , wherein the first build-up layer includes an outermost third resin insulating layer formed on the first resin insulating layer and is formed such that the first resin insulating layer comprises a resin material and does not contain a core material and that the outermost third resin insulating layer comprises a resin material and a core material, and the second build-up layer includes an outermost fourth resin insulating layer formed on the second resin insulating layer and is formed such that the second resin insulating layer comprises a resin material and does not contain a core material and that the outermost fourth resin insulating layer comprises a resin material and a core material.

7. The printed wiring board according to claim 6 , wherein the first build-up layer is formed such that no via conductors penetrating through the outermost third resin insulating layer are formed on the plurality of first via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, and the second build-up layer is formed such that no via conductors penetrating through the outermost fourth resin insulating layer are formed on the plurality of second via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements.

8. The printed wiring board according to claim 6 , wherein the rows and the columns are same numbers.

9. The printed wiring board according to claim 7 , wherein the rows and the columns are same numbers.

10. A printed wiring board, comprising:

a core substrate comprising a core material and having an opening such that the opening penetrates through the core substrate;

a plurality of thermoelectric elements comprising a plurality of P-type thermoelectric elements and a plurality of N-type thermoelectric elements such that the plurality of thermoelectric elements is accommodated in the opening of the core substrate;

a first build-up layer configured to mount a heat-absorbing element thereon and comprising a first resin insulating layer such that the first resin insulating layer is formed on a first surface of the core substrate and covering the opening of the core substrate; and

a second build-up layer configured to mount a heat-generating element thereon and comprising a second resin insulating layer such that the second resin insulating layer is formed on a second surface of the core substrate on an opposite side with respect to the first surface of the core substrate and covering the opening of the core substrate and has a thickness that is greater than a thickness of the first resin insulating layer,

wherein the first build-up layer includes a first conductor layer formed on the first resin insulating layer, and a plurality of first via conductors penetrating through the first resin insulating layer and connecting the first conductor layer to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, and the second build-up layer includes a second conductor layer formed on the second resin insulating layer, and a plurality of second via conductors penetrating through the second resin insulating layer and connecting the second conductor layer to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements such that each of the second via conductors has a length that is greater than a length of each of the first via conductors.

11. The printed wiring board according to claim 10 , wherein the first build-up layer includes an outermost third resin insulating layer formed on the first resin insulating layer and is formed such that the first resin insulating layer comprises a resin material and does not contain a core material and that the outermost third resin insulating layer comprises a resin material and a core material, and the second build-up layer includes an outermost fourth resin insulating layer formed on the second resin insulating layer and is formed such that the second resin insulating layer comprises a resin material and does not contain a core material and that the outermost fourth resin insulating layer comprises a resin material and a core material.

12. The printed wiring board according to claim 11 , wherein the first build-up layer is formed such that no via conductors penetrating through the outermost third resin insulating layer are formed on the plurality of first via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, and the second build-up layer is formed such that no via conductors penetrating through the outermost fourth resin insulating layer are formed on the plurality of second via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements.

13. The printed wiring board according to claim 11 , wherein the plurality of thermoelectric elements is positioned in rows and columns in the opening of the core substrate such that the P-type thermoelectric elements and the N-type thermoelectric elements are alternately positioned at intersection points of the rows and the columns.

14. The printed wiring board according to claim 10 , wherein the plurality of thermoelectric elements is positioned in rows and columns in the opening of the core substrate such that the P-type thermoelectric elements and the N-type thermoelectric elements are alternately positioned at intersection points of the rows and the columns.

15. The printed wiring board according to claim 14 , wherein the rows and the columns are same numbers.

16. A printed wiring board, comprising:

a core substrate comprising a core material and having an opening such that the opening penetrates through the core substrate;

a plurality of thermoelectric elements comprising a plurality of P-type thermoelectric elements and a plurality of N-type thermoelectric elements such that the plurality of thermoelectric elements is accommodated in the opening of the core substrate;

a first build-up layer configured to mount a heat-absorbing element thereon and comprising a first resin insulating layer such that the first resin insulating layer is formed on a first surface of the core substrate and covering the opening of the core substrate; and

a second build-up layer configured to mount a heat-generating element thereon and comprising a second resin insulating layer such that the second resin insulating layer is formed on a second surface of the core substrate on an opposite side with respect to the first surface of the core substrate and covering the opening of the core substrate and has a thickness that is greater than a thickness of the first resin insulating layer,

wherein the first build-up layer includes a first conductor layer formed on the first resin insulating layer, and a plurality of first via conductors penetrating through the first resin insulating layer and connecting the first conductor layer to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, the second build-up layer includes a second conductor layer formed on the second resin insulating layer, and a plurality of second via conductors penetrating through the second resin insulating layer and connecting the second conductor layer to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, and each of the first and second via conductors has a recess portion formed on an upper surface thereof such that the recess portion in each of the second via conductors has a depth that is greater than a depth of the recess portion in each of the first via conductors.

17. The printed wiring board according to claim 16 , wherein the first build-up layer includes an outermost third resin insulating layer formed on the first resin insulating layer and is formed such that the first resin insulating layer comprises a resin material and does not contain a core material and that the outermost third resin insulating layer comprises a resin material and a core material, and the second build-up layer includes an outermost fourth resin insulating layer formed on the second resin insulating layer and is formed such that the second resin insulating layer comprises a resin material and does not contain a core material and that the outermost fourth resin insulating layer comprises a resin material and a core material.

18. The printed wiring board according to claim 17 , wherein the first build-up layer is formed such that no via conductors penetrating through the outermost third resin insulating layer are formed on the plurality of first via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements, and the second build-up layer is formed such that no via conductors penetrating through the outermost fourth resin insulating layer are formed on the plurality of second via conductors directly connected to the plurality of P-type thermoelectric elements and the plurality of N-type thermoelectric elements.

19. The printed wiring board according to claim 16 , wherein the plurality of thermoelectric elements is positioned in rows and columns in the opening of the core substrate such that the P-type thermoelectric elements and the N-type thermoelectric elements are alternately positioned at intersection points of the rows and the columns.

20. The printed wiring board according to claim 19 , wherein the rows and the columns are same numbers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2020
From: TANIGUCHI, HIROTAKA
To: IBIDEN CO., LTD.
Reel/Frame 054093/0708 →
Priority Claims (1)
JP JP2019-136989 · Jul 25, 2019 · national
Continuity (1)
Related Publication 20210028340A1 · Jan 28, 2021