IP Library › Granted Patent US 11,545,411
Granted Patent B2
US 11,545,411 · App. 16/941,487 · Granted Jan 3, 2023

Package comprising wire bonds configured as a heat spreader

Inventors: Wen Yin (Chandler, AZ); Yonghao An (San Diego, CA); Reynante Tamunan Alvarado (Escondido, CA)
Assignee: QUALCOMM INCORPORATED
H01L23/3677H01L21/56H01L23/552H01L24/32H01L24/43H01L24/48H01L24/49H01L24/73H01L24/92H01L2224/32225H01L2224/43847H01L2224/48227H01L2224/4912H01L2224/49051H01L2224/73265H01L2224/92247
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Quick Facts
Patent No.
US 11,545,411
App. No.
16/941,487
Granted
Jan 3, 2023
Kind
B2
Abstract

A package that includes a substrate, an integrated device, a plurality of first wire bonds, at least one second wire bond, and an encapsulation layer. The integrated device is coupled to the substrate. The plurality of first wire bonds is coupled to the integrated device and the substrate. The plurality of first wire bonds is configured to provide at least one electrical path between the integrated device and the substrate. The at least one second wire bond is coupled to the integrated device. The at least one second wire bond is configured to be free of an electrical connection with a circuit of the integrated device. The encapsulation layer is located over the substrate and the integrated device. The encapsulation layer encapsulates the integrated device, the plurality of first wire bonds and the at least one second wire bond.

Claims (76)

1. A package comprising:

a substrate;

an integrated device coupled to the substrate, wherein the integrated device comprises:

a die substrate;

a plurality of active devices located over the die substrate;

a plurality of first die interconnects coupled to the plurality of active devices;

at least one second die interconnect configured to be free of electrical connection with the plurality of active devices; and

at least one die substrate via coupled to the at least one second die interconnect, wherein the at least one die substrate via extends through a back side of the integrated device;

a plurality of first wire bonds coupled to the integrated device and the substrate, wherein the plurality of first wire bonds is configured to provide at least one electrical path between the integrated device and the substrate;

at least one second wire bond coupled to the integrated device,

wherein the at least one second wire bond is configured to be coupled to the at least one second die interconnect of the integrated device, and

wherein the at least one second wire bond is configured to be free of an electrical connection with the plurality of active devices of the integrated device; and

an encapsulation layer located over the substrate and the integrated device, wherein the encapsulation layer encapsulates the integrated device, the plurality of first wire bonds and the at least one second wire bond.

2. The package of claim 1 ,

wherein the at least one second wire bond is configured to dissipate heat from the integrated device by providing a thermally conductive path for heat to dissipate from the integrated device.

3. The package of claim 1 , further comprising a metal layer formed over an outer surface of the encapsulation layer, wherein the metal layer is configured as an electromagnetic interference (EMI) shield.

4. The package of claim 3 , wherein the at least one second wire bond is coupled to the metal layer.

5. The package of claim 1 , wherein the integrated device includes a bare die.

6. The package of claim 1 , wherein the at least one die substrate via is located in the die substrate of the integrated device.

7. The package of claim 1 , wherein the plurality of active devices is part of a circuit for the integrated device.

8. The package of claim 1 , wherein the plurality of active devices includes a plurality of transistors.

9. The package of claim 1 , wherein the integrated device further comprises at least one die interconnect coupled to (i) a back side of the die substrate and (ii) the at least one die substrate via.

10. The package of claim 1 ,

where the integrated device includes a back side and a front side,

wherein the back side of the integrated device is coupled to a first surface of the substrate through a die attach, and

wherein the front side of the integrated device is electrically coupled to the first surface of the substrate through the plurality of first wire bonds.

11. The package of claim 1 , wherein an end portion of the at least second wire bond is located away from the integrated device and the substrate.

12. The package of claim 1 , wherein the at least one second wire bond includes at least one vertical wire bond, at least one diagonal wire bond, at least one curved wire bond, at least one non-linear wire bond, or combinations thereof.

13. The package of claim 1 , wherein the integrated device includes a power amplifier.

14. The package of claim 1 , wherein the package includes a radio frequency front end (RFFE) package.

15. An apparatus comprising:

a substrate;

an integrated device coupled to the substrate, wherein the integrated device comprises:

a die substrate;

a plurality of transistors located over the die substrate;

at least one die interconnect configured to be free of electrical connection with the plurality of transistors; and

at least one die substrate via coupled to the at least one die interconnect, wherein the at least one die substrate via extends through the die substrate;

means for wire interconnection coupled to the integrated device and the substrate, wherein the means for wire interconnection is configured to provide at least one electrical path between the integrated device and the substrate;

means for wire heat dissipation coupled to the integrated device, wherein the means for wire heat dissipation is configured to be free of an electrical connection with the plurality of transistors of the integrated device; and

means for encapsulation located over the substrate and the integrated device, wherein the means for encapsulation encapsulates the integrated device, the means for wire interconnection and the means for wire heat dissipation.

16. The apparatus of claim 15 , wherein the means for wire heat dissipation is configured to dissipate heat from the integrated device by providing a thermally conductive path for heat to dissipate from the integrated device.

17. The apparatus of claim 15 , further comprising means for electromagnetic interference (EMI) shield located over an outer surface of the means for encapsulation.

18. The apparatus of claim 17 , wherein the means for wire heat dissipation is coupled to the means for EMI shield.

19. The apparatus of claim 15 , wherein the integrated device includes a bare die.

20. The apparatus of claim 15 , wherein the integrated device further comprises a plurality of first die interconnects coupled to the plurality of transistors.

21. The apparatus of claim 15 , wherein the means for wire heat dissipation is configured to be coupled to the at least one die interconnect.

22. The apparatus of claim 15 , wherein the integrated device further comprises a plurality of first die interconnects coupled to the plurality of transistors.

23. The apparatus of claim 15 ,

where the integrated device includes a bare die comprising a back side and a front side,

wherein the back side of the bare die is coupled to a first surface of the substrate through a die attach, and

wherein the front side of the bare die is electrically coupled to the first surface of the substrate through the means for wire interconnection.

24. The apparatus of claim 15 , wherein the means for wire heat dissipation includes at least one vertical wire bond, at least one diagonal wire bond, at least one curved wire bond, at least one non-linear wire bond, or combinations thereof.

25. A device comprising a package, the package comprising:

a substrate;

an integrated device coupled to the substrate, wherein the integrated device comprises:

a die substrate;

a plurality of transistors located over the die substrate;

at least one die interconnect configured to be free of electrical connection with the plurality of transistors; and

at least one die substrate via coupled to the at least one die interconnect, wherein the at least one die substrate via extends through the die substrate;

a plurality of first wire bonds coupled to the integrated device and the substrate, wherein the plurality of first wire bonds is configured to provide at least one electrical path between the integrated device and the substrate;

at least one second wire bond coupled to the at least one die interconnect of the integrated device, wherein the at least one second wire bond is configured to be free of an electrical connection with the plurality of transistors of the integrated device; and

an encapsulation layer located over the substrate and the integrated device, wherein the encapsulation layer encapsulates the integrated device, the plurality of first wire bonds and the at least one second wire bond.

26. The device of claim 25 , wherein the device is selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (IoT) device, and a device in an automotive vehicle.

27. A method for fabricating package, comprising:

providing a substrate;

coupling an integrated device to the substrate, wherein the integrated device comprises:

a die substrate;

a plurality of transistors located over the die substrate;

at least one die interconnect configured to be free of electrical connection with the plurality of transistors; and

at least one die substrate via coupled to the at least one die interconnect, wherein the at least one die substrate via extends through the die substrate;

coupling a plurality of first wire bonds to the integrated device and the substrate, wherein the plurality of first wire bonds is configured to provide at least one electrical path between the integrated device and the substrate;

coupling at least one second wire bond to the integrated device, wherein the at least one second wire bond is configured to be free of an electrical connection with the plurality of transistors of the integrated device; and

forming an encapsulation layer over the substrate and the integrated device, wherein the encapsulation layer encapsulates the integrated device, the plurality of first wire bonds and the at least one second wire bond.

28. The method of claim 27 , wherein the at least one second wire bond is configured to dissipate heat from the integrated device.

29. The method of claim 27 , further comprising forming a metal layer over an outer surface of the encapsulation layer, wherein the metal layer is configured as an electromagnetic interference (EMI) shield.

30. The method of claim 29 , wherein forming the metal layer comprises coupling the metal layer to the at least one second wire bond.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2020
From: YIN, WEN; AN, YONGHAO; ALVARADO, REYNANTE TAMUNAN
To: QUALCOMM INCORPORATED
Reel/Frame 053340/0902 →
Continuity (1)
Related Publication 20220037224A1 · Feb 3, 2022