IP Library › Granted Patent US 11,355,346
Granted Patent B2
US 11,355,346 · App. 16/946,283 · Granted Jun 7, 2022

Methods for processing semiconductor wafers having a polycrystalline finish

Inventors: Guoqiang David Zhang (Ballwin, MO); Mark Crooks (Inmann, SC); Tracy Michelle Ragan (Warrenton, MO)
Assignee: GlobalWafers Co., Ltd.
H01L21/30625B24B53/017H01L21/02532H01L21/02595H01L21/304H01L21/3212H01L22/20H01L22/12
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,355,346
App. No.
16/946,283
Granted
Jun 7, 2022
Kind
B2
Abstract

A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. The silicon layer has a substantially uniform thickness. The silicon layer is polished to smooth the silicon layer such that the thickness is substantially uniform after polishing.

Claims (38)

1. A method of processing a semiconductor wafer comprising:

depositing a silicon layer on the semiconductor wafer, the silicon layer having a thickness that is substantially uniform;

determining an initial wafer profile of the semiconductor wafer prior to polishing the silicon layer, wherein the initial wafer profile has a dish shape;

dressing an edge area of a pad surface of a polishing pad based on the initial wafer profile having the dish shape; and

polishing the silicon layer based on the initial wafer profile using the polishing pad to smooth the silicon layer such that the thickness is substantially uniform after polishing and such that the semiconductor wafer has a shape that matches the dish shape of the initial wafer profile.

2. The method of claim 1 , wherein determining the initial wafer profile comprises inspecting the semiconductor wafer prior to depositing the silicon layer to determine the initial wafer profile.

3. The method of claim 1 , wherein determining the initial wafer profile comprises inspecting the semiconductor wafer after depositing the silicon layer to determine the initial wafer profile.

4. The method of claim 1 , further comprising:

inspecting the semiconductor wafer to determine a post-polishing wafer profile after removal of a portion of the silicon layer; and

comparing the initial wafer profile to the post-polishing wafer profile to determine variations between the initial wafer profile and the post-polishing wafer profile,

wherein dressing the polishing pad further comprises dressing the polishing pad based on the variations between the initial wafer profile and the post-polishing wafer profile.

5. The method of claim 1 , wherein the silicon layer is a polycrystalline silicon layer, the polycrystalline silicon layer having a reduced roughness after polishing and a polycrystalline grain boundary being reduced by polishing.

6. The method of claim 1 further comprising applying slurry to an outer surface of the silicon layer, the slurry including abrasive particles and a base.

7. The method of claim 1 further comprising positioning the semiconductor wafer in a polishing apparatus, the polishing apparatus including the polishing pad.

8. The method of claim 1 , further comprising:

inspecting the semiconductor wafer to determine a post-polishing wafer profile after removal of a portion of the silicon layer; and

comparing the post-polishing wafer profile to a target wafer profile to determine variations between the post-polishing wafer profile and the target wafer profile,

wherein dressing the polishing pad further comprises dressing the polishing pad based on the variations between the post-polishing wafer profile and the target wafer profile.

9. The method of claim 1 , wherein the pad surface has a circular shape and the edge area extends radially between 2.5 cm and 5 cm from an outer edge of the polishing pad.

10. A method of processing a semiconductor wafer comprising:

depositing a silicon layer on the semiconductor wafer, the silicon layer having a thickness that is substantially uniform;

determining an initial wafer profile of the semiconductor wafer prior to polishing the silicon layer, wherein the initial wafer profile has a dome shape;

dressing a center area of a pad surface of a polishing pad based on the initial wafer profile having the dome shape; and

polishing the silicon layer based on the initial wafer profile using the polishing pad to smooth the silicon layer such that the thickness is substantially uniform after polishing and such that the semiconductor wafer has a shape that matches the dome shape of the initial wafer profile.

11. The method of claim 10 , wherein determining the initial wafer profile comprises inspecting the semiconductor wafer prior to depositing the silicon layer to determine the initial wafer profile.

12. The method of claim 10 , wherein determining the initial wafer profile comprises inspecting the semiconductor wafer after depositing the silicon layer to determine the initial wafer profile.

13. The method of claim 10 , further comprising:

inspecting the semiconductor wafer to determine a post-polishing wafer profile after removal of a portion of the silicon layer; and

comparing the initial wafer profile to the post-polishing wafer profile to determine variations between the initial wafer profile and the post-polishing wafer profile,

wherein dressing the polishing pad further comprises dressing the polishing pad based on the variations between the initial wafer profile and the post-polishing wafer profile.

14. The method of claim 10 , wherein the silicon layer is a polycrystalline silicon layer, the polycrystalline silicon layer having a reduced roughness after polishing and a polycrystalline grain boundary being reduced by polishing.

15. The method of claim 10 further comprising applying slurry to an outer surface of the silicon layer, the slurry including abrasive particles and a base.

16. The method of claim 10 further comprising positioning the semiconductor wafer in a polishing apparatus, the polishing apparatus including the polishing pad.

17. The method of claim 10 , further comprising:

inspecting the semiconductor wafer to determine a post-polishing wafer profile after removal of a portion of the silicon layer; and

comparing the post-polishing wafer profile to a target wafer profile to determine variations between the post-polishing wafer profile and the target wafer profile,

wherein dressing the polishing pad further comprises dressing the polishing pad based on the variations between the post-polishing wafer profile and the target wafer profile.

18. The method of claim 10 , wherein the pad surface has a circular shape, the center area being spaced radially inward from an outer edge of the polishing pad between 15 cm and 20 cm.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2020
From: ZHANG, GUOQIANG DAVID; CROOKS, MARK; RAGAN, TRACY MICHELLE
To: SUNEDISON SEMICONDUCTOR LIMITED (UEN201334164H)
Reel/Frame 052959/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2020
From: SUNEDISON SEMICONDUCTOR LIMITED (UEN201334164H)
To: GLOBALWAFERS CO., LTD.
Reel/Frame 052959/0629 →
Continuity (3)
Continuation 15577515
Provisional Application 62168247 · May 29, 2015
Related Publication 20200312671A1 · Oct 1, 2020