Zone-aware memory management in memory subsystems

1. A system comprising:

a memory device comprising a plurality of physical memory blocks and associated with a logical address space that comprises a plurality of zones, wherein each zone comprises a plurality of logical block addresses (LBAs); and

a processing device, operatively coupled with the memory device, to perform operations comprising:

receiving a request to store data referenced by an LBA associated with a first zone of the plurality of zones;

obtaining a version identifier of the first zone, wherein the version identifier of the first zone characterizes a number of times the first zone has been invalidated, wherein invalidating the first zone comprises invalidating all LBAs of the first zone;

obtaining erase values for a plurality of available physical memory blocks of the memory device, wherein each erase value represents a number of completed erase operations for a respective one of the plurality of memory blocks;

selecting, in view of the version identifier of the first zone and the erase values, a first physical memory block of the plurality of available physical memory blocks;

mapping a next available LBA associated with the first zone to the first physical memory block; and

storing the data in the first physical memory block.

2. The system of claim 1 , wherein each of the plurality of zones is invalidated by moving a write pointer to a first LBA of a respective zone.

3. The system of claim 1 , wherein overwriting information referenced by the LBA associated with the first zone comprises invalidating at least some LBAs of the first zone.

4. The system of claim 1 , wherein the first zone has a lowest number of invalidation operations as a whole among the plurality of zones, and wherein the first physical memory block has a highest erase value among a subset of available physical memory blocks whose erase value does not exceed a threshold erase value.

5. The system of claim 1 , wherein the first zone is different from a zone having a lowest number of invalidation operations as a whole among the plurality of zones, and wherein the first physical memory block has a lowest erase value among the plurality of available physical memory blocks.

6. The system of claim 1 , wherein selecting the first physical memory block comprises:

obtaining a first distribution of version identifiers of the plurality of zones;

obtaining a second distribution of erase values of the plurality of available physical memory blocks; and

selecting the first physical memory block based on the first distribution and the second distribution.

7. The system of claim 6 , wherein selecting the first physical memory block based on the first distribution and the second distribution comprises:

dividing the first distribution into a first plurality identifying a specified number of version identifier intervals of the first distribution;

dividing the second distribution into a second plurality identifying the specified number of erase value intervals of the second distribution;

identifying that the version identifier of the first zone belongs to a j-th lowest version identifier interval of the first distribution; and

selecting the first physical memory block from a j-th highest erase value interval of the second distribution.

8. The system of claim 1 , wherein the request to store data is generated by an application executed by a host computing system communicatively coupled to the memory device, and wherein the first zone is assigned to the application.

9. The system of claim 1 , wherein the operations further comprise:

initiating a scan of the memory device;

identifying the first zone of the plurality of zones as a zone having a lowest version identifier;

starting with a first LBA of the first zone, performing error correction analysis to detect at-risk physical memory blocks mapped to consecutive LBAs of the first zone; and

selecting an action, based on a comparison of a number of detected at-risk physical memory blocks mapped to at least a subset of LBAs of the first zone to a threshold number of at risk-blocks, from at least one of:

stopping the scan of the memory device at the first zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the first zone is below the threshold number of at risk-blocks, or

continuing the scan of the memory device beyond the first zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the first zone is above the threshold number of at risk-blocks.

10. The system of claim 9 , wherein the operations further comprise:

upon determining that the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the first zone is above the threshold number of at risk-blocks, identifying a second zone as having a second lowest version identifier of the plurality of zones;

starting with a first LBA of the second zone, performing error correction analysis to detect at-risk physical memory blocks mapped to consecutive LBAs of the second zone; and

selecting a subsequent action, based on a comparison of a number of detected at-risk physical memory blocks mapped to at least a subset of LBAs of the second zone to the threshold number of at risk-blocks, from at least one of:

stopping the scan of the memory device at the second zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the second zone is below the threshold number of at risk-blocks, or

continuing the scan of the memory device beyond the second zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the second zone is above the threshold number of at risk-blocks.

11. A system comprising:

a memory device comprising a plurality of physical memory blocks and associated with a logical address space that comprises a plurality of zones, wherein each zone comprises a plurality of logical block addresses (LBAs), and

a processing device, operatively coupled with the memory device, to perform operations comprising:

initiating a scan of the memory device;

identifying a first zone of the plurality of zones as a zone having a lowest version identifier, wherein the version identifier of a zone reflects a number of times the zone has been invalidated, wherein invalidating the first zone comprises invalidating all LBAs of the first zone;

starting with a first LBA of the first zone, performing error correction analysis to detect at-risk physical memory blocks mapped to consecutive LBAs of the first zone; and

selecting an action, based on a comparison of a number of detected at-risk physical memory blocks mapped to at least a subset of LBAs of the first zone to a threshold number of at risk-blocks, from at least one of:

stopping the scan of the memory device at the first zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the first zone is below the threshold number of at risk-blocks, or

continuing the scan of the memory device beyond the first zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the first zone is above the threshold number of at risk-blocks.

12. The system of claim 11 , wherein the operations further comprise:

upon determining that the number of detected at-risk physical memory blocks is below the threshold number of at-risk blocks, stopping the scan of the memory device.

13. The system of claim 11 , wherein the operations further comprise:

upon determining that the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the first zone is above the threshold number of at risk-blocks, identifying a second zone as having a second lowest identifier number of the plurality of zones;

starting with a first LBA of the second zone, performing error correction analysis to detect at-risk physical memory blocks mapped to consecutive LBAs of the second zone; and

selecting a subsequent action, based on a comparison of a number of detected at-risk physical memory blocks mapped to at least a subset of LBAs of the second zone to the threshold number of at risk-blocks, from at least one of:

stopping the scan of the memory device at the second zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the second zone is below the threshold number of at risk-blocks, or

continuing the scan of the memory device beyond the second zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the first zone is above the threshold number of at risk-blocks.

14. A system of claim 13 , wherein the physical memory blocks mapped to at least the subset of the LBAs of the first zone have a same first erase value.

15. A system of claim 14 , wherein the physical memory blocks mapped to at least a subset of the LBAs of the second zone have a same second erase value, wherein the second erase value is higher than the first erase value.

16. The system of claim 14 , wherein the operations further comprise:

upon determining that the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the second zone is above the threshold number of at risk-blocks, identifying a third zone as having a third lowest version identifier of the plurality of zones;

starting with a first LBA of the third zone, performing error correction analysis to detect at-risk physical memory blocks mapped to consecutive LBAs of the third zone; and

selecting a next subsequent action, based on a comparison of a number of a number of detected at-risk physical memory blocks mapped to at least a subset of LBAs of the third zone to the threshold number of at risk-blocks, from at least one of:

stopping the scan of the memory device at the third zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the third zone is below the threshold number of at risk-blocks, or

continuing the scan of the memory device beyond the third zone, if the number of detected at-risk physical memory blocks mapped to the subset of LBAs of the third zone is above the threshold number of at risk-blocks.

17. A system of claim 11 , wherein the operations performed by the processing device further comprise:

receiving a request to store data in association with the first zone of the plurality of zones;

obtaining a version identifier of the first zone;

obtaining erase values for a plurality of available physical memory blocks;

selecting, in view of the version identifier of the first zone and the obtained erase values, a target physical memory block of the plurality of available physical memory blocks;

mapping the target physical memory block to a next available LBA associated with the first zone; and

storing the data in the target physical memory block.

18. A method comprising:

receiving, by a processing device operatively coupled with a memory device, a request to store data referenced by a logical block address (LBA) associated with a first zone of a plurality of zones, wherein each zone comprises a plurality of logical block addresses (LBAs) of a logical address space of the memory device, the memory device having a plurality of physical memory blocks;

obtaining, by the processing device, a version identifier of the first zone, wherein the version identifier of the first zone characterizes a number of times the first zone has been invalidated, wherein invalidating the first zone comprises invalidating all LBAs of the first zone;

obtaining, by the processing device, erase values for a plurality of available physical memory blocks of the memory device, wherein each erase value represents a number of completed erase operations for a respective one of the plurality of available memory blocks;

selecting, by the processing device, in view of the version identifier of the first zone and the erase values, a first physical memory block of the plurality of available physical memory blocks;

mapping, by the processing device, a next available LBA associated with the first zone to the first physical memory block; and

storing, by the processing device, the data in the first physical memory block.

19. The method of claim 18 , wherein the first zone has a lowest number of invalidation operations among the plurality of zones, and wherein the first physical memory block has a highest erase value among a subset of available physical memory blocks whose erase value does not exceed a threshold erase value.